Patents by Inventor Tahorng Yang

Tahorng Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6998316
    Abstract: A fabrication method for a read only memory provides a substrate having a memory cell region and a periphery circuit region. A memory cell region has a memory cell array and the periphery circuit region has transistors. A precise layer having a plurality of first openings is formed in the memory cell region. The first openings are above the channel region of each memory cell in the memory cell array and the critical dimension of the first openings is identical. A mask layer having second openings and third openings is formed on the substrate. The second openings locate over a pre-coding memory cell region, and the third openings locate over the transistor gates. An ion implantation is performed to code the memory cell in the pre-coding memory cell region and to adjust the threshold voltage of the transistor, using the precise layer and the mask layer as a mask.
    Type: Grant
    Filed: February 18, 2004
    Date of Patent: February 14, 2006
    Assignee: Macronix International Co, Ltd.
    Inventors: Tahorng Yang, Henry Chung, Cheng-Chen Calvin Hsueh, Ching-Yu Chang
  • Patent number: 6861176
    Abstract: A method of forming holes in a layer through a cross-shape image exposure. The method includes removing a section from each corner of the rectangular patterns on a photomask to form cross-shape patterns so that circular or elliptical contact holes are formed on a photoresist layer after photo-exposure and development. Optical image contrast between contacts is increased by the cross-shape patterns on the photomask.
    Type: Grant
    Filed: September 9, 2002
    Date of Patent: March 1, 2005
    Assignee: Macronix International Co., Ltd.
    Inventors: Tsung-Hsien Wu, Ching-Yu Chang, Tahorng Yang
  • Publication number: 20040161900
    Abstract: A fabrication method for a read only memory provides a substrate having a memory cell region and a periphery circuit region. A memory cell region has a memory cell array and the periphery circuit region has transistors. A precise layer having a plurality of first openings is formed in the memory cell region. The first openings are above the channel region of each memory cell in the memory cell array and the critical dimension of the first openings is identical. A mask layer having second openings and third openings is formed on the substrate. The second openings locate over a pre-coding memory cell region, and the third openings locate over the transistor gates. An ion implantation is performed to code the memory cell in the pre-coding memory cell region and to adjust the threshold voltage of the transistor, using the precise layer and the mask layer as a mask.
    Type: Application
    Filed: February 18, 2004
    Publication date: August 19, 2004
    Inventors: Tahorng Yang, Henry Chung, Cheng-Chen Calvin Hsueh, Ching-Yu Chang
  • Patent number: 6734064
    Abstract: A fabrication method for a read only memory provides a substrate having a memory cell region and a periphery circuit region. A memory cell region has a memory cell array and the periphery circuit region has transistors. A precise layer having a plurality of first openings is formed in the memory cell region. The first openings are above the channel region of each memory cell in the memory cell array and the critical dimension of the first openings is identical. A mask layer having second openings and third openings is formed on the substrate. The second openings locate over a pre-coding memory cell region, and the third openings locate over the transistor gates. An ion implantation is performed to code the memory cell in the pre-coding memory cell region and to adjust the threshold voltage of the transistor, using the precise layer and the mask layer as a mask.
    Type: Grant
    Filed: February 24, 2003
    Date of Patent: May 11, 2004
    Assignee: MACRONIX International Co., Ltd.
    Inventors: Tahorng Yang, Henry Chung, Cheng-Chen Calvin Hsueh, Ching-Yu Chang
  • Publication number: 20040048469
    Abstract: A method of forming holes in a layer through a cross-shape image exposure. The method includes removing a section from each corner of the rectangular patterns on a photomask to form cross-shape patterns so that circular or elliptical contact holes are formed on a photoresist layer after photo-exposure and development. Optical image contrast between contacts is increased by the cross-shape patterns on the photomask.
    Type: Application
    Filed: September 9, 2002
    Publication date: March 11, 2004
    Inventors: Tsung-Hsien Wu, Ching-Yu Chang, Tahorng Yang
  • Publication number: 20030181013
    Abstract: A fabrication method for a read only memory provides a substrate having a memory cell region and a periphery circuit region. A memory cell region has a memory cell array and the periphery circuit region has transistors. A precise layer having a plurality of first openings is formed in the memory cell region. The first openings are above the channel region of each memory cell in the memory cell array and the critical dimension of the first openings is identical. A mask layer having second openings and third openings is formed on the substrate. The second openings locate over a pre-coding memory cell region, and the third openings locate over the transistor gates. An ion implantation is performed to code the memory cell in the pre-coding memory cell region and to adjust the threshold voltage of the transistor, using the precise layer and the mask layer as a mask.
    Type: Application
    Filed: February 24, 2003
    Publication date: September 25, 2003
    Inventors: TAHORNG YANG, HENRY CHUNG, CHENG-CHEN CALVIN HSUEH, CHING-YU CHANG
  • Patent number: 6624092
    Abstract: A method is used to form an insulating layer with foamed structure. About the method, a gel layer over a substrate, where the gel layer includes several types of solution, an unextractable material, and a solvent. The substrate is then put in a closed pressure chamber. The closed pressure chamber is heated to a subcritical temperature with respect to the material which is included in the gel layer but to be extracted out. In this situation, liquid and the material to be extracted all turn to a vapor phase due to the pressure in the pressure chamber has reached the subcritical pressure, whereby materials are extracted. Under this temperature, the vapor is flushed away, and a noble gas is flushed into the pressure chamber for cleaning. The substrate with the gel layer is cooled down to the environmental temperature. Then the substrate is taken out from the pressure chamber.
    Type: Grant
    Filed: June 28, 2001
    Date of Patent: September 23, 2003
    Assignee: Macronix International Co., Ltd.
    Inventor: Tahorng Yang
  • Publication number: 20030003769
    Abstract: A method is used to form an insulating layer with foamed structure. About the method, a gel layer over a substrate, where the gel layer includes several types of solution, an unextractable material, and a solvent. The substrate is then put in a closed pressure chamber. The closed pressure chamber is heated to a subcritical temperature with respect to the material which is included in the gel layer but to be extracted out. In this situation, liquid and the material to be extracted all turn to a vapor phase due to the pressure in the pressure chamber has reached the subcritical pressure, whereby materials are extracted. Under this temperature, the vapor is flushed away, and a noble gas is flushed into the pressure chamber for cleaning. The substrate with the gel layer is cooled down to the environmental temperature. Then the substrate is taken out from the pressure chamber.
    Type: Application
    Filed: June 28, 2001
    Publication date: January 2, 2003
    Inventor: Tahorng Yang