Patents by Inventor Tai An

Tai An has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230115934
    Abstract: A surgical navigation method includes obtaining a three-dimensional image; selecting a viewing angle direction; generating one or more two-dimensional images arranged along the viewing angle direction from the three-dimensional image; superimposing the one or more two-dimensional images along the viewing angle direction to form a two-dimensional superimposed image; and guiding a movement of a virtual surgical instrument into the two-dimensional superimposed image.
    Type: Application
    Filed: October 17, 2022
    Publication date: April 13, 2023
    Inventors: Chen-Tai LIN, Shan-Chien CHENG, Ying-Yi CHENG
  • Publication number: 20230112963
    Abstract: Systems and methods for managing the power consumption of an oxygen concentrator are disclosed. An oxygen concentration system may comprise a compression system, a canister system, one or more processors, and at least one of a pressure sensor or a movement sensor. The one or more processors may be configured to transition the oxygen concentration system to at least one of a prescribed mode of operation or a standby mode of operation. The timing of the transition may be based on at least one of a number of breaths detected from the pressure signals generated by the pressure sensor or an estimated energy content of the movement signal generated by the movement sensor. A predetermined volume or concentration of oxygen enriched air may be supplied to a user during the prescribed mode of operation. A reduced power may be provided to the compression system during the standby mode of operation.
    Type: Application
    Filed: March 22, 2021
    Publication date: April 13, 2023
    Applicants: ResMed Asia Pte. Ltd., ResMed KK, ResMed Pty Ltd
    Inventors: Stephen YUEN, Kyi Thu MAUNG, Yong Sern GWEE, Leong Kee CHEE, Praveen JAGADEESAN, Rex Dael NAVARRO, Henry ROHLICH, Gordon Joseph MALOUF, Teck Wei TAN, Meiyi JIANG, Tai Liang TING
  • Publication number: 20230114191
    Abstract: A method includes forming a first dummy gate stack on a protruding semiconductor fin, etching the first dummy gate stack to form a trench, extending the trench downwardly to penetrate through a portion of the protruding semiconductor fin, and filling the trench with a dielectric material to form a fin isolation region. A seam is formed in the fin isolation region, and the seam extends to a level lower than a top surface level of the protruding semiconductor fin. The seam has a top width smaller than about 1 nm. A second dummy gate stack on the protruding semiconductor fin is replaced with a replacement gate stack.
    Type: Application
    Filed: February 18, 2022
    Publication date: April 13, 2023
    Inventors: Bo-Cyuan Lu, Tai-Chun Huang, Chi On Chui
  • Publication number: 20230110420
    Abstract: A semiconductor device includes passive electrical components in a substrate; and an interconnect structure over the passive electrical components, conductive features of the interconnect structure being electrically coupled to the passive electrical components. The conductive features of the interconnect structure includes a first conductive line over the substrate; a conductive bump over the first conductive line, where in a plan view, the conductive bumps has a first elongated shape and is entirely disposed within boundaries of the first conductive line; and a first via between the first conductive line and the conductive bump, the first via electrically connected to the first conductive line and the conductive bump, where in the plan view, the first via has a second elongated shape and is entirely disposed within boundaries of the conductive bump.
    Type: Application
    Filed: December 12, 2022
    Publication date: April 13, 2023
    Inventors: Ying-Cheng Tseng, Yu-Chih Huang, Chih-Hsuan Tai, Ting-Ting Kuo, Chi-Hui Lai, Ban-Li Wu, Chiahung Liu, Hao-Yi Tsai
  • Publication number: 20230111895
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first fin structure and a second fin structure over a substrate. The method includes forming a dielectric layer over the substrate, the first fin structure, and the second fin structure. The method includes forming a first work function layer in the first trench and the second trench. The method includes forming a first mask layer over the first work function layer in the first trench. The method includes removing the first work function layer exposed by the first mask layer. The method includes removing the first mask layer. The method includes forming a first gate electrode in the first trench and a second gate electrode in the second trench. The method includes forming a first hard mask layer in the first trench and a second hard mask layer in the second trench.
    Type: Application
    Filed: December 12, 2022
    Publication date: April 13, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wen-Han FANG, Chang-Yin CHEN, Ming-Chia TAI, Po-Chi WU
  • Patent number: 11625112
    Abstract: An input device includes a casing, a base member, a ball member, a control ring and a gravity wheel. The casing includes an upper cover and a lower cover. The upper cover has an opening. The ball member is installed on the base member. The ball member is partially exposed outside the opening. The control ring is arranged around the base member. The control ring is partially exposed outside the opening. The control ring is freely rotatable around the base member. The control ring includes a first inclined part, a rack structure, and a lateral wall. The lateral wall is connected with the first inclined part and the rack structure. The gravity wheel is engaged with the rack structure. Consequently, the rotation of the control ring is suppressed by the gravity wheel.
    Type: Grant
    Filed: May 27, 2022
    Date of Patent: April 11, 2023
    Assignee: PRIMAX ELECTRONICS LTD.
    Inventors: Yung-Tai Pan, Chun-Che Wu, Ting-Sheng Wang
  • Patent number: 11623371
    Abstract: A UV (ultraviolet) curing apparatus for a contact-lens polymerization process is provided. A UV curing module is equipped for the mold cavities of contact-lens curing molds, including a plurality of first UV light sources arranged above the mold cavities and a plurality of second UV light sources arranged below the mold cavities. A plurality of light output areas of a first light guide device guides the light beams emitted by the first UV light sources to illuminate upper light receiving surfaces of the molds. A plurality of reflecting plates of a second light guide device reflects and scatters the light beams emitted by the second UV light sources to lower light receiving surfaces of the molds. Thereby, the contact-lens polymer inside the molds is uniformly cured, and the yield is raised.
    Type: Grant
    Filed: March 16, 2021
    Date of Patent: April 11, 2023
    Assignee: Hope Vision Co., Ltd.
    Inventors: Shih Hong Chu, Zheng Jun Su, Cheng Tai Jao, Hsin Pei Yu, Huan Chiu Tsen
  • Patent number: 11626341
    Abstract: A package structure includes a substrate, a semiconductor device and an adhesive layer. The semiconductor device is disposed on the substrate, wherein an angle ? is formed between one sidewall of the semiconductor device and one of sides of the substrate, 0°<?<90°. The adhesive layer surrounds the semiconductor device on the substrate and at least continuously disposed at two of the sides of the substrate, wherein the adhesive layer has a first opening misaligned with a corner of the semiconductor device closest to the first opening.
    Type: Grant
    Filed: March 24, 2022
    Date of Patent: April 11, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Hui Wang, Der-Chyang Yeh, Shih-Peng Tai, Tsung-Shu Lin, Yi-Chung Huang
  • Patent number: 11627386
    Abstract: An information capturing device includes a setting storage unit, a positioning unit, an audiovisual recording unit and a control unit. The setting storage unit stores a fence setting of a hotspot. The positioning unit, coupled to the setting storage unit, detects a current position, determines whether the current position is within a first geographic boundary defined by the fence setting, and outputs an activation notification when the current position is within the first geographic boundary. The control unit, coupled to the positioning unit and the audiovisual recording unit, activates the audiovisual recording according to the activation notification to perform audiovisual recording so as to capture environmental data.
    Type: Grant
    Filed: August 13, 2021
    Date of Patent: April 11, 2023
    Assignee: GETAC TECHNOLOGY CORPORATION
    Inventor: Min-Tai Chen
  • Patent number: 11623960
    Abstract: An isolated antibody, comprising heavy chain complementary determining regions CDR1, CDR2, and CDR3 from a heavy chain variable region sequence having SEQ ID NO: 1 or 3; light chain complementary determining regions CDR1, CDR2, and CDR3 from a light chain variable region sequence having SEQ ID NO: 2 or 4; wherein the antibody binds specifically to both vascular endothelial growth factor receptor-2 (VEGFR2) and vascular endothelial growth factor receptor-3 (VEGFR3).
    Type: Grant
    Filed: March 20, 2019
    Date of Patent: April 11, 2023
    Assignee: National Health Research Institutes
    Inventors: Neng-yao Shih, Ko-jiunn Liu, Li-tzong Chen, Wen-chun Hung, Yun-chang Chen, Kuan-chung Hsiao, San-tai Shen
  • Publication number: 20230104095
    Abstract: A testing device includes a power supply and a plurality of testing ports. The testing ports are electrically connected to the power supply. Each of the testing ports includes a contact and a current clamper. The contact is configured to electrically couple a device under test (DUT). The current clamper is connected between the power supply and the contact and configured to allow a limited current having a predetermined current value to flow to the contact.
    Type: Application
    Filed: October 4, 2021
    Publication date: April 6, 2023
    Inventors: Chun-Ying LAI, Hung-An TAI, Chih-Ming CHANG
  • Publication number: 20230109039
    Abstract: A key structure including a base, a light sensing module, a carrier, a magnetic member, a cap, and a scissor structure are provided. The light sensing module is disposed at the base. The carrier is located above the base. The magnetic member is disposed on the carrier. The cap is adapted to be assembled to the carrier via a magnetic attracting force of the magnetic member or adapted to be detached from the carrier via overcoming the magnetic attracting force of the magnetic member. The scissor structure is connected between the base and the carrier. The carrier and the cap disposed thereon move up and down relative to the base via the scissor structure. An orthogonal projection of the magnetic member on the base is not overlapped with an orthogonal projection of the light sensing module on the base. A keyboard is also provided.
    Type: Application
    Filed: November 29, 2022
    Publication date: April 6, 2023
    Applicant: Acer Incorporated
    Inventors: Hung-Chi Chen, Shun-Bin Chen, Huei-Ting Chuang, Wen-Chieh Tai, Yi-Hsin Pan
  • Publication number: 20230103702
    Abstract: Provided is an optical scanning element, which has a large scan angle, is quickly responsive, and can be downsized. The optical scanning element includes: a photonic crystal layer having holes periodically formed in an electro-optical crystal substrate; a line-defect optical waveguide formed in the photonic crystal layer; a diffraction grating arranged in at least one portion selected from an upper portion, a left side surface portion, and a right side surface portion of the optical waveguide; and electrodes arranged on a left side and a right side of the optical waveguide. The optical scanning element is configured so that an emission angle of light emitted from an upper surface of the optical waveguide is changed.
    Type: Application
    Filed: November 30, 2022
    Publication date: April 6, 2023
    Applicant: NGK Insulators, Ltd.
    Inventors: Jungo KONDO, Kentaro TANI, Keiichiro ASAI, Tomoyoshi TAI
  • Publication number: 20230103309
    Abstract: Some embodiments relate to a semiconductor structure. The semiconductor structure includes a conductive structure over a semiconductor substrate. A first dielectric layer is over the conductive structure. A second dielectric layer is over the first dielectric layer. An interconnect structure is over the conductive structure and disposed in the first and second dielectric layers. The interconnect structure has a protrusion in direct contact with a sidewall of the conductive structure. The interconnect structure comprises an interconnect liner surrounding a conductive interconnect body.
    Type: Application
    Filed: December 12, 2022
    Publication date: April 6, 2023
    Inventors: Sheng-Chau Chen, Cheng-Tai Hsiao, Cheng-Yuan Tsai, Hsun-Chung Kuang
  • Publication number: 20230106688
    Abstract: An electronic device is provided. The electronic device includes a metal housing, a substrate and a radiating element. The metal housing is provided with a slot, and the slot includes an opening end and a closed end. The slot has a first wall of the slot and a second wall of the slot opposite to each other at the position of the opening end. The first wall of the slot is located between the second wall of the slot and the closed end. There is a predetermined distance between the first wall of the slot and the closed end. A feeding portion of the radiating element is connected to a feeding element and a signal is fed through the feeding element, so that the radiating element is used for exciting the metal housing to generate at least one resonance frequency.
    Type: Application
    Filed: April 13, 2022
    Publication date: April 6, 2023
    Inventors: CHIH-FENG TAI, KUAN-HSUN LAI, KUEI -CHENG WANG
  • Publication number: 20230109179
    Abstract: Provided are various mechanisms and processes for automatic computer vision-based defect detection using a neural network. A system is configured for receiving historical datasets that include training images corresponding to one or more known defects. Each training image is converted into a corresponding matrix representation for training the neural network to adjust weighted parameters based on the known defects. Once sufficiently trained, a test image of an object that is not part of the historical dataset is obtained. Portions of the test image are extracted as input patches for input into the neural network as respective matrix representations. A probability score indicating the likelihood that the input patch includes a defect is automatically generated for each input patch using the weighted parameters. An overall defect score for the test image is then generated based on the probability scores to indicate the condition of the object.
    Type: Application
    Filed: December 9, 2022
    Publication date: April 6, 2023
    Applicant: QEEXO, CO.
    Inventors: Rajen Bhatt, Shitong Mao, Raviprakash Kandury, Michelle Tai, Geoffrey Newman
  • Publication number: 20230104203
    Abstract: An article adapted to receive multiple battery cells, such as a battery module, which provides thermal insulation between adjacent battery cells using thermally insulating layers comprising a ceramifiable elastomeric silicone material, using fumed silica (amorphous SiO2) or fumed silica (amorphous SiO2)+quartz (crystalline SiO2). There is also provided, the use of said ceramifiable elastomeric silicone material as a means of delaying and/or preventing thermal runaway in such an article. Typically, the battery cells for which this article is designed are lithium-ion battery cells.
    Type: Application
    Filed: February 17, 2020
    Publication date: April 6, 2023
    Inventors: Yusheng CHEN, Peng WANG, Xiangyang TAI, Yi GUO, Rui WANG, Yi ZHANG, Qing SHI
  • Publication number: 20230104706
    Abstract: An oscillation unit (101), a measurement unit (102), and a bit generation unit (103) are included. The measurement unit (102) chronologically measures oscillation (for example, thermal oscillation) of a set frequency generated in the oscillation unit (101) at each set time. The bit generation unit (103) generates a bit string by allocating one bit of 0 or 1 to each of sine and cosine components of the oscillation measured by the measurement unit (102).
    Type: Application
    Filed: February 21, 2020
    Publication date: April 6, 2023
    Applicant: Nippon Telegraph and Telephone Corporation
    Inventors: Motoki Asano, Ryuichi Ota, Takuma Aihara, Tai Tsuchizawa, Hajime Okamoto, Hiroshi Yamaguchi
  • Patent number: 11621282
    Abstract: Provided is a multiplexing signal processing device based on a passive element including a plurality of signal converters that respectively process a plurality of input signals and are arranged in a matrix consisting of N rows and M columns and include N signal converter blocks respectively connected to N row unit output terminals; and M signal converter blocks respectively connected to M column unit output terminals. The signal converters each include a first diode having an input terminal connected to an input signal node, a second diode having an input terminal connected to the input signal node, and a ground resistor coupled to the input signal node.
    Type: Grant
    Filed: January 14, 2020
    Date of Patent: April 4, 2023
    Assignee: SOGANG UNIVERSITY RESEARCH & BUSINESS DEVELOPMENT FOUNDATION
    Inventors: Ji Woong Jung, Yong Choi, Kun Tai Park
  • Patent number: 11620085
    Abstract: A processing device, operatively coupled with a memory device, performs operations including receiving a write request from a host system at a first time, the write request identifying first data to be stored in a segment of the memory device, determining whether a pre-read voltage level of the write request satisfies a pre-read voltage level criterion pertaining to a write-to-write time interval for the segment, wherein the write-to-write time interval is defined by the first time and a second time corresponding to a last time at which the segment was written, and responsive to determining that the pre-read voltage level satisfies the pre-read voltage level criterion pertaining to the write-to-write time interval, performing a pre-read operation on the segment using the pre-read voltage level to determine second data currently stored in the segment.
    Type: Grant
    Filed: October 20, 2021
    Date of Patent: April 4, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Ying Yu Tai, Jiangli Zhu