Patents by Inventor Tai An

Tai An has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240176700
    Abstract: An operation method of a storage controller, which is configured to control a nonvolatile memory device, includes initiating a first instance of a respective reliability operation for a respective memory block included in the nonvolatile memory device, the respective reliability operation including detecting a degradation level of the respective memory block and setting a respective skip reference value based on the detected degradation level; determining whether a respective number of consecutively skipped instances of the respective reliability operation is less than the respective skip reference value; and selectively skipping or performing a next instance of the respective reliability operation based on the determination result.
    Type: Application
    Filed: November 17, 2023
    Publication date: May 30, 2024
    Inventors: Youngjoo SEO, Youngdeok SEO, Sangkwon MOON, Hyunkyo OH, Hee-Tai OH, Heewon LEE, Jisoo KIM
  • Publication number: 20240178102
    Abstract: A package includes a frontside redistribution layer (RDL) structure, a semiconductor die on the frontside RDL structure, and a backside RDL structure on the semiconductor die including a first RDL, and a backside connector extending from a distal side of the first RDL and including a tapered portion having a width that decreases in a direction away from the first RDL, wherein the tapered portion includes a contact surface at an end of the tapered portion. A method of forming the package may include forming the backside redistribution layer (RDL) structure, attaching a semiconductor die to the backside RDL structure, forming an encapsulation layer around the semiconductor die on the backside RDL structure, and forming a frontside RDL structure on the semiconductor die and the encapsulation layer.
    Type: Application
    Filed: April 21, 2023
    Publication date: May 30, 2024
    Inventors: Chun-Ti LU, Hao-Yi TSAI, Chiahung LIU, Ken-Yu CHANG, Tzuan-Horng LIU, Chih-Hao CHANG, Bo-Jiun LIN, Shih-Wei CHEN, Pei-Rong NI, Hsin-Wei HUANG, Zheng GangTsai, Tai-You LIU, Steve SHIH, Yu-Ting HUANG, Steven SONG, Yu-Ching WANG, Tsung-Yuan YU, Hung-Yi KUO, CHung-Shi LIU, Tsung-Hsien CHIANG, Ming Hung TSENG, Yen-Liang LIN, Tzu-Sung HUANG, Chun-Chih CHUANG
  • Publication number: 20240176134
    Abstract: The present application relates to the field of intelligent home appliance technologies, and discloses a method for determining target parameters of a polarizer, including: obtaining light parameters of a display lamp which will use a polarizer and a target visual effect; and simulating a light effect of the polarizer by a debugging system and determining the target parameters of the polarizer by adjusting the light effect, such that a superposition visual effect of the polarizer under the target parameters and the display lamp is matched with the target visual effect. In the present application, the target parameters of the polarizer can be accurately determined by the debugging system, thus facilitating manufacture of the polarizer meeting visual requirements, avoiding repeated debugging and manufacturing operations, and saving time and cost.
    Type: Application
    Filed: December 15, 2021
    Publication date: May 30, 2024
    Applicants: QINGDAO HAIRIGAO TECHNOLOGY CO., LTD., HAIER SMART HOME CO.,LTD
    Inventors: Jianhui HUANG, Tai WANG
  • Patent number: 11996297
    Abstract: A method of manufacturing a semiconductor device includes forming an underlying structure in a first area and a second area over a substrate. A first layer is formed over the underlying structure. The first layer is removed from the second area while protecting the first layer in the first area. A second layer is formed over the first area and the second area, wherein the second layer has a smaller light transparency than the first layer. The second layer is removed from the first area, and first resist pattern is formed over the first layer in the first area and a second resist pattern over the second layer in the second area.
    Type: Grant
    Filed: April 5, 2022
    Date of Patent: May 28, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chin-Ta Chen, Han-Wei Wu, Yuan-Hsiang Lung, Hua-Tai Lin
  • Patent number: 11996489
    Abstract: A silicon nitride core is formed on a silicon core via a first silicon oxide layer, and a germanium pattern caused to selectively grow in an opening penetrating through a second silicon oxide layer formed on the silicon nitride core and the first silicon oxide layer is formed on a lower silicon pattern formed to be continuous with the silicon core, thereby constituting a Ge photodiode.
    Type: Grant
    Filed: June 6, 2019
    Date of Patent: May 28, 2024
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Tai Tsuchizawa, Takuma Aihara, Tatsuro Hiraki
  • Patent number: 11994146
    Abstract: A fan device includes a hub and a plurality of fan blades. Each of the fan blades includes a driving surface, and the driving surface includes a first tooth column and a second tooth column. The first tooth column includes a plurality of first skin-tooth units. Each of the first skin-tooth units includes a first body. A first middle ridge and two first side ridges protrude from a surface of the first body, and a groove is formed between two adjacent first skin-tooth units. The second tooth column includes a plurality of second skin-tooth units. Each of the second skin-tooth units includes a second body and an extension element. A second middle ridge and two second side ridges protrude from a surface of the second body, and the extension element is located in the groove and includes an extension rib.
    Type: Grant
    Filed: November 22, 2022
    Date of Patent: May 28, 2024
    Assignee: GIGA-BYTE TECHNOLOGY CO., LTD.
    Inventors: Shun-Chih Huang, Tai-Chuan Mao, Huan-Zhong Chen, Chun-Liang Guo
  • Patent number: 11996523
    Abstract: A secondary battery includes a body including a solid electrolyte layer, and a positive electrode and a negative electrode disposed with the solid electrolyte layer interposed therebetween; and first and second external electrodes respectively disposed on one surface and the other surface of the body, opposite to the one surface, and respectively connected to the positive electrode and the negative electrode, wherein the positive electrode comprises a positive electrode active material layer and a first electrolytic mixing portion disposed at an interface of the positive electrode in contact with the solid electrolyte layer. The first electrolytic mixing portion is a mixture of a positive electrode active material and a liquid phase and/or gel phase electrolyte.
    Type: Grant
    Filed: April 7, 2020
    Date of Patent: May 28, 2024
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Young Mi Kim, Tai Young Kim, Kwang Wook Bae
  • Publication number: 20240164945
    Abstract: A laser eye surgery system produces a treatment beam that includes a plurality of laser pulses. An optical coherence tomography (OCT) subsystem produces a source beam used to locate one or more structures of an eye. The OCT subsystem is used to sense the distance between a camera objective on the underside of the laser eye surgery system and the patient's eye. Control electronics compare the sensed distance with a pre-determined target distance, and reposition a movable patient support toward or away the camera objective until the sensed distance is at the pre-determined target distance. A subsequent measurement dependent upon the spacing between the camera objective and the patient's eye is performed, such as determining the astigmatic axis by observing the reflection of a plurality of point source LEDs arranged in concentric rings off the eye.
    Type: Application
    Filed: May 10, 2022
    Publication date: May 23, 2024
    Inventors: Javier G. Gonzalez, David A. Dewey, Noah Bareket, Michael A. Campos, Yu-tai Ray Chen, David D. Scott
  • Publication number: 20240168057
    Abstract: A probe card for high-frequency testing is provided. The probe card includes a substrate, a flexible substrate, a probe, and at least one movable conductive pillar. The substrate has a first surface, a second surface, and at least one first through hole. The flexible substrate is disposed on the second surface of the substrate and has at least one second through hole. The second through hole and the first through hole correspond to each other. The probe is disposed on the second surface of the substrate, and is electrically connected to the flexible substrate. The movable conductive pillar movably passes through the first through hole and the second through hole.
    Type: Application
    Filed: April 10, 2023
    Publication date: May 23, 2024
    Inventors: HUNG-CHUN HUANG, WEN-HAO CHENG, YUAN-TING TAI
  • Publication number: 20240170617
    Abstract: A light-emitting diode package structure includes a driving substrate, at least one light-emitting unit, and a reflective colloid. The driving substrate has a surface. The light-emitting unit includes at least one mini light-emitting diode and at least one wavelength conversion layer. The mini light-emitting diode is disposed on the surface of the driving substrate and electrically connected to the driving substrate. The wavelength conversion layer covers the mini light-emitting diode. The reflective colloid covers a periphery of the light-emitting unit and the driving substrate. The light-emitting unit is suitable for emitting a light, and the reflective colloid is suitable for reflecting the light so as to focus on a light-emitting direction.
    Type: Application
    Filed: July 19, 2023
    Publication date: May 23, 2024
    Applicant: E Ink Holdings Inc.
    Inventor: Sheng-Chieh Tai
  • Publication number: 20240168217
    Abstract: An optical film, an optical film set, a backlight module and a display device are provided. The optical film includes a main body, plural first prism structures and plural second prism structures. The main body has a first optical surface and a second optical surface. The first prism structures are disposed on the first optical surface. Each of the first prism structures extends along a first direction. The second prism structures are disposed on the second optical surface. Each of the second prism structures extends along a second direction. The first direction is different from the second direction.
    Type: Application
    Filed: January 24, 2024
    Publication date: May 23, 2024
    Inventors: Wei-Hsuan CHEN, Chung-Yung TAI, Chun-Yi WU
  • Publication number: 20240170360
    Abstract: A semiconductor device includes a substrate, an electronic component, a cover and a liquid metal. The electronic component is disposed on the substrate. The cover is disposed on the substrate, coves the electronic component and has a recess. The liquid metal is formed between the recess and the electronic component.
    Type: Application
    Filed: January 25, 2024
    Publication date: May 23, 2024
    Inventors: Chun-Yin LIN, Yu-Jin LI, Tai-Yu CHEN, Pu-Shan HUANG
  • Publication number: 20240168261
    Abstract: A photographing system lens assembly includes, in order from an object side to an image side: a first lens element, a second lens element, a third lens element and a fourth lens element. Each of the four lens elements has an object-side surface facing toward the object side and an image-side surface facing toward the image side. At least one surface of at least one lens element in the photographing system lens assembly has at least one inflection point. The first lens element has positive refractive power, the object-side surface of the first lens element is convex in a paraxial region thereof, and the image-side surface of the first lens element is convex in a paraxial region thereof. The object-side surface of the second lens element is concave in a paraxial region thereof. The image-side surface of the third lens element is concave in a paraxial region thereof.
    Type: Application
    Filed: March 10, 2023
    Publication date: May 23, 2024
    Applicant: LARGAN PRECISION CO., LTD.
    Inventors: Yu-Tai TSENG, Po-Wei CHEN, I-Hsuan CHEN, Hsin-Hsuan HUANG
  • Publication number: 20240171159
    Abstract: A level shifter can achieve a level shift by a wide margin. The level shifter includes a latch circuit, a protection circuit, and an input circuit. The latch circuit is coupled between a high-voltage terminal and the protection circuit. The protection circuit including a first protection transistor pair and a second protection transistor pair is set between the latch circuit and the input circuit, and is configured to prevent an excessive voltage drop between the input circuit and a pair of output terminals, wherein the pair of output terminals is set between the first and the second protection transistor pairs and used for outputting a pair of output signals. The input circuit includes an input transistor pair coupled between the second protection transistor pair and a low-voltage terminal and configured to operate according to a pair of input signals.
    Type: Application
    Filed: February 2, 2024
    Publication date: May 23, 2024
    Inventors: CHIEN-HUI TSAI, Hung-Chen Chu, Yung-Tai Chen
  • Publication number: 20240170584
    Abstract: A semiconductor structure includes a substrate including a recess indented into the substrate, a capacitor structure at least partially disposed within the recess, and an interconnect structure disposed over and electrically connected to the capacitor structure. The capacitor structure includes a first electrode layer, a second electrode layer over the first electrode layer, and a first dielectric between the first electrode layer and the second electrode layer. The first electrode layer includes a first body portion disposed in and conformal to the recess and a first extending portion disposed on the substrate, and the second electrode layer covers the first dielectric, the first body portion and the first extending portion of the first electrode layer.
    Type: Application
    Filed: January 16, 2023
    Publication date: May 23, 2024
    Inventors: CHIH-HSUAN TAI, HSIANG-TAI LU
  • Publication number: 20240171713
    Abstract: An illumination system that provides an illumination beam is provided. The illumination system includes a first light source module, a second light source module, a third light source module, a first optical element, a second optical element, and a third optical element. The first light source module and the second light source module provide a first color light beam, a second color light beam, and a third color light beam. The third light source module provides a third color light beam. The first optical element, the second optical element and the third optical element are disposed on transmission paths of the first color light beam, the second color light beam and the third color light beam, and the first light source module and the second light source module are respectively located on opposite sides of the first optical element and the second optical element.
    Type: Application
    Filed: November 9, 2023
    Publication date: May 23, 2024
    Applicant: Coretronic Corporation
    Inventors: Kuan-Lun Chen, Kai-Jiun Wang, Ming-Tsung Weng, Shun-Tai Chen
  • Publication number: 20240170053
    Abstract: A latch formed from a memory cell includes a clock input terminal configured to receive a clock signal, complementary first and second data terminals, and a latch circuit. The latch circuit has first and second inverters. The first inverter has an input terminal coupled to the first data terminal, and the second inverter has an input terminal coupled to the second data terminal. A first pass gate transistor is coupled between an output terminal of the second inverter and the first data terminal. A second pass gate transistor is coupled between an output terminal of the first inverter and the second data terminal. The first and second pass gate transistors each have a gate terminal coupled to the clock input terminal. The input terminal of the first inverter is not directly connected to the output terminal of the second inverter, and the input terminal of the second inverter is not directly connected to the output terminal of the first inverter.
    Type: Application
    Filed: January 26, 2024
    Publication date: May 23, 2024
    Inventors: Hua-Hsin Yu, Cheng Hung Lee, Hung-Jen Liao, Hau-Tai Shieh
  • Publication number: 20240170349
    Abstract: A method of manufacturing a semiconductor structure, comprising: disposing a dielectric layer over a semiconductive wafer defined with a plurality of active regions and a scribe line region surrounding each of the plurality of active regions; forming a plurality of interconnect structures within the dielectric layer, wherein the formation of the plurality of interconnect structures includes forming a plurality of first testing pads within the scribe line region and at least partially exposed through the dielectric layer; and sawing the semiconductive wafer along the scribe line region to form a first interposer and a second interposer, wherein each of the plurality of first testing pads is at least partially removed by the sawing of the semiconductive wafer.
    Type: Application
    Filed: January 15, 2023
    Publication date: May 23, 2024
    Inventors: CHIH-HSUAN TAI, YU-WEI CHIU, KUO WEN CHEN, HSIANG-TAI LU
  • Publication number: 20240166711
    Abstract: The present application provides a method for promoting the sternness and/or transdifferentiation of acinar cells, comprising the following steps: providing an acinar cell, transfecting a plasmid into the acinar cell, and culturing the transfected acinar cell, wherein the plasmid contains a genetic material for overexpression of N-acetylglucosaminyltransferase V (GnT-V).
    Type: Application
    Filed: November 18, 2022
    Publication date: May 23, 2024
    Inventors: Pei-Jen Lou, Tai-Horng Young, Ching-Chia Cheng, Mei-Chun Lin, Hisn-Lin Chen
  • Patent number: D1029404
    Type: Grant
    Filed: November 21, 2023
    Date of Patent: May 28, 2024
    Assignee: Cattasaurus LLC
    Inventor: Tai Do Anh Tran