Abstract: A channel hiatus correction method for an HDMI device is provided. A recovery code from scrambled data of the stream is obtained. A liner feedback shift register (LFSR) value of channels of the HDMI port is obtained based on the recovery code and the scrambled data of the stream. The stream is de-scrambled according to the LFSR value of the channels of the HDMI port. Video data is displayed according to the de-scrambled stream.

Abstract: A method includes etching a gate stack in a wafer to form a trench, depositing a silicon nitride liner extending into the trench, and depositing a silicon oxide layer. The process of depositing the silicon oxide layer includes performing a treatment process on the wafer using a process gas including nitrogen and hydrogen, and performing a soaking process on the wafer using a silicon precursor.

Abstract: The present invention discloses a display including a display panel and a light redirecting film disposed on the viewing side of the display panel. The light redirecting film comprises a light redistribution layer, and a light guide layer disposed on the light redistribution layer. The light redistribution layer includes a plurality of strip-shaped micro prisms extending along a first direction and arranged at intervals and a plurality of diffraction gratings arranged at the bottom of the intervals between the adjacent strip-shaped micro prisms, wherein each of the strip-shaped micro prisms has at least one inclined light-guide surface, and the bottom of each interval has at least one set of diffraction gratings, and the light guide layer is in contact with the strip-shaped micro prisms and the diffraction gratings.

Abstract: A system and methods of forming a dielectric material within a trench are described herein. In an embodiment of the method, the method includes introducing a first precursor into a trench of a dielectric layer, such that portions of the first precursor react with the dielectric layer and attach on sidewalls of the trench. The method further includes partially etching portions of the first precursor on the sidewalls of the trench to expose upper portions of the sidewalls of the trench. The method further includes introducing a second precursor into the trench, such that portions of the second precursor react with the remaining portions of the first precursor to form the dielectric material at the bottom of the trench.

Abstract: A probe card device and a transmission structure are provided. The transmission structure includes a supporting layer, a plurality of metal conductors spaced apart from each other and slantingly inserted into the supporting layer, and an insulating resilient layer formed on the supporting layer. Each of the metal conductors includes a positioning segment held in the supporting layer, a connecting segment and an embedded segment respectively extending from two ends of the positioning segment, and an exposed segment extending from the embedded segment. Each of the embedded segments is embedded and fixed in the insulating resilient layer, and each of the exposed segments protrudes from the insulating resilient layer. When any one of the exposed segments is pressed by an external force, the insulating resilient layer is configured to absorb the external force through the corresponding embedded segment so as to have a deformation providing a stroke distance.

Abstract: A wafer transporting method includes following operations. A plurality of wafers are received in a semiconductor container attached to a mobile vehicle. An air processing system is coupled to a wall of the semiconductor container. The air processing system includes an inlet valve, an outlet valve, a pump between the inlet valve and the outlet valve, and a desiccant coupled to the pump. The semiconductor container is moved. The pump of the air processing system is turned on to extract air from inside the semiconductor container into the air processing system through the inlet valve. Humidity of the air is reduced when the air passes through the desiccant of the air processing system. The air is returned back to the semiconductor container through the outlet valve.

Abstract: A method for fabricating a semiconductor device includes the steps of: providing a substrate, wherein the substrate comprises a MRAM region and a logic region; forming a magnetic tunneling junction (MTJ) on the MRAM region; forming a top electrode on the MTJ; and then performing a flowable chemical vapor deposition (FCVD) process to form a first inter-metal dielectric (IMD) layer around the top electrode and the MTJ.

Abstract: Apparatus, systems and methods for irrigating lands are disclosed. In one example, an irrigation system is disclosed. The irrigation system includes a gate and a microcontroller unit (MCU). The gate is configured for adjusting a water flow for irrigating a piece of land. The MCU is configured for controlling the gate to adjust the water flow based on environmental information related to the piece of land.

Abstract: A cooking device is provided, including: a pot body, including a circumferential wall and a bottom wall which define a receiving space; a heating assembly, disposed around the circumferential wall; a stirring member, located in the receiving space and rotatably mounted to the bottom wall; a safety control assembly, including a first temperature sensor disposed on the bottom wall, a second temperature sensor disposed on the circumferential wall and a third temperature sensor disposed on the heating assembly; wherein temperatures detected respectively by the first, second and third temperature sensors are defined as first, second and third temperatures, respectively, and when the cooking device is on and a temperature difference between the first and second temperatures is larger than a reference temperature difference, the safety control assembly sends out a warming and control the heating assembly to stop operating.

Abstract: A cooking device is provided, including a main body, a stirrer assembly, a heating assembly, a fixing assembly and a thermal insulation layer. The main body includes a bottom wall and a circumferential wall which define a receiving space therebetween. The heating assembly is disposed around and contacts an outer surface of the circumferential wall. The fixing assembly includes at least one restriction member and at least one latch unit, and the at least one restriction member is disposed around the circumferential wall and covers the heating assembly. The thermal insulation layer is disposed between the circumferential wall and the at least one restriction member, and the thermal insulation layer covers at least ? of the outer surface of the circumferential wall.

Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a top electrode on the MTJ, a trapping layer in the top electrode for trapping hydrogen, a first inter-metal dielectric (IMD) layer on the MTJ, and a first metal interconnection in the first IMD layer and on the top electrode. Preferably, a top surface of the trapping layer is lower than a bottom surface of the first IMD layer.

Abstract: A method for fabricating a semiconductor device includes the steps of: providing a substrate, wherein the substrate comprises a MRAM region and a logic region; forming a magnetic tunneling junction (MTJ) on the MRAM region; forming a top electrode on the MTJ; and then performing a flowable chemical vapor deposition (FCVD) process to form a first inter-metal dielectric (IMD) layer around the top electrode and the MTJ.

Abstract: A semiconductor device includes a first magnetic tunneling junction (MTJ) and a second MTJ on a substrate, a first top electrode on the first MTJ and a second top electrode on the second MTJ, a first spacer and a second spacer around the first MTJ, a third spacer and a fourth spacer around the second MTJ, a passivation layer between the second spacer and the third spacer as a top surface of the passivation layer includes a V-shape, and an ultra low-k (ULK) dielectric layer on the passivation layer and around the first MTJ and the second MTJ.

Abstract: A method for fabricating semiconductor device includes first forming a first magnetic tunneling junction (MTJ) and a second MTJ on a substrate, performing an atomic layer deposition (ALD) process or a high-density plasma (HDP) process to form a passivation layer on the first MTJ and the second MTJ, performing an etching process to remove the passivation layer adjacent to the first MTJ and the second MTJ, and then forming an ultra low-k (ULK) dielectric layer on the passivation layer.

Abstract: A motor control system with adjustable voltage harmonic and method for correcting the motor control system is disclosed. Based on the input modulation order, the motor control system drives and controls a motor. The motor control system includes: a harmonic voltage weight selection unit, used to select weight values of the harmonic wave corresponding to the modulation order, a modulation signal selection unit, used to select the output pulse duty ratio modulation signal corresponding to the modulation order. Based on the weight values of the harmonic wave, the output pulse duty ratio modulation signal and the pulse modulation carrier frequency signal, a pulse modulation part generates a control signal. Based on the control signal, the inverter circuit adds the harmonic voltage into the motor-driving voltage that drives the motor, so as to improve the noise condition of the motor.

Abstract: A backlight module is provided. The backlight module includes a substrate having a substrate surface, a conductive layer disposed on the substrate surface, a plurality of LED chips disposed on and electrically connected to the conductive layer, a light-permeable layer having a light-permeable surface away from the substrate surface, and a pattern layer disposed on the light-permeable surface and having a plurality of first patterns corresponding to and respectively located above the plurality of LED chips. Wherein, each first pattern has a maximum width. A maximum width of one first pattern satisfies the following formula: WP?2n(TE?TL)(1?1/n2)1/2+WL; wherein WP is the maximum width of one first pattern, n is a refractivity of the light-permeable layer, TE is a thickness of the light-permeable layer, TL is a thickness of the LED chip, WL is a maximum width of LED chip corresponding to the first pattern.

Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a top electrode on the MTJ, a trapping layer in the top electrode for trapping hydrogen, a first inter-metal dielectric (IMD) layer on the MTJ, and a first metal interconnection in the first IMD layer and on the top electrode. Preferably, a top surface of the trapping layer is lower than a bottom surface of the first IMD layer.

Abstract: A semiconductor device includes a first magnetic tunneling junction (MTJ) and a second MTJ on a substrate, a passivation layer on the first MTJ and the second MTJ, and an ultra low-k (ULK) dielectric layer on the passivation layer. Preferably, a top surface of the passivation layer between the first MTJ and the second MTJ is lower than a top surface of the passivation layer directly on top of the first MTJ.

Abstract: A pixel package includes a carrier, a first light-emitting unit, a second light emitting unit, a reflective layer, and a light-absorbing layer. The carrier has a top surface and a conductive layer. The first light-emitting unit and the second light-emitting unit are arranged on the conductive layer and have a light-emitting surface and a side surface respectively. The reflective layer is arranged on the top surface and contacts the conductive layer. The light-absorbing layer is arranged on the reflective layer and contacts the first side surface and the second side surface while exposing the first light-emitting surface and the second light-emitting surface. In a cross-sectional view, the light-absorbing layer has a first thickness and a second thickness between the first side surface and the second side surface. The first thickness is farther away from and the first side surface than the second thickness, and is smaller than the second thickness.