Abstract: A semiconductor device with isolation structures of different dielectric constants and a method of fabricating the same are disclosed. The semiconductor device includes fin structures with first and second fin portions disposed on first and second device areas on a substrate and first and second pair of gate structures disposed on the first and second fin portions. The second pair of gate structures is electrically isolated from the first pair of gate structures. The semiconductor device further includes a first isolation structure interposed between the first pair of gate structures and a second isolation structure interposed between the second pair of gate structures. The first isolation structure includes a first nitride liner and a first oxide fill layer. The second isolation structure includes a second nitride liner and a second oxide fill layer. The second nitride layer is thicker than the first nitride layer.

Abstract: A high side voltage boost control circuit of a high voltage battery control system comprises: a linear regulator circuit powered by a first high voltage power rail to generate a high side reference ground potential; a boost circuit powered by a first low voltage power rail, converting it into a second high voltage power rail according to a boost enable signal and regulating a boosted voltage to a predetermined target voltage; a feedback signal generation circuit powered by the first low voltage power rail to generate a feedback voltage according to the boosted voltage; and a comparison circuit comparing the feedback voltage with a reference voltage to generate the boost enable signal. The battery voltage is higher than a withstand voltage of at least one device in the boost, feedback, and comparison circuits.

Abstract: A battery management system includes a MOSFET unit and a control circuit. The MOSFET unit includes a charging MOSFET and a discharging MOSFET, wherein the MOSFET unit is coupled to a positive side power path to control charging and discharging a battery. In a process of turning OFF discharging MOSFET, the control circuit is configured to operably electrically connect a gate-source capacitor of the discharge MOSFET to a discharge level for discharging the gate-source capacitor, and determine to stop discharging the gate-source capacitor according to a difference of a pack pin voltage and a discharge pin voltage, wherein the discharge level is lower than the pack pin voltage.

Abstract: A method includes forming a first and a second dummy gate stack crossing over a semiconductor region, forming an ILD to embed the first and the second dummy gate stacks therein, replacing the first and the second dummy gate stacks with a first and a second replacement gate stack, respectively, performing a first etching process to form a first opening. A portion of the first replacement gate stack and a portion of the second replacement gate stack are removed. The method further includes filling the first opening to form a dielectric isolation region, performing a second etching process to form a second opening, with the ILD being etched, and the dielectric isolation region being exposed to the second opening, forming a contact spacer in the second opening, and filling a contact plug in the second opening. The contact plug is between opposite portions of the contact spacer.

Abstract: An embodiment includes a method including forming an opening in a cut metal gate region of a metal gate structure of a semiconductor device, conformally depositing a first dielectric layer in the opening, conformally depositing a silicon layer over the first dielectric layer, performing an oxidation process on the silicon layer to form a first silicon oxide layer, filling the opening with a second silicon oxide layer, performing a chemical mechanical polishing on the second silicon oxide layer and the first dielectric layer to form a cut metal gate plug, the chemical mechanical polishing exposing the metal gate structure of the semiconductor device, and forming a first contact to a first portion of the metal gate structure and a second contact to a second portion of the metal gate structure, the first portion and the second portion of the metal gate structure being separated by the cut metal gate plug.

Abstract: A method includes forming a first and a second dummy gate stack crossing over a semiconductor region, forming an ILD to embed the first and the second dummy gate stacks therein, replacing the first and the second dummy gate stacks with a first and a second replacement gate stack, respectively, performing a first etching process to form a first opening. A portion of the first replacement gate stack and a portion of the second replacement gate stack are removed. The method further includes filling the first opening to form a dielectric isolation region, performing a second etching process to form a second opening, with the ILD being etched, and the dielectric isolation region being exposed to the second opening, forming a contact spacer in the second opening, and filling a contact plug in the second opening. The contact plug is between opposite portions of the contact spacer.

Abstract: The present invention discloses a flat display device and a manufacture method thereof. The flat display device includes a flat display module, a front cover, an auxiliary support, a back cover set, and a circuit board. The back cover set includes a sub-cover and a main back cover, wherein the circuit board is disposed on the inner surface of the sub-cover. The front cover has a display opening for an active area of the flat display module to be exposed outside the display opening and present images through the display opening. The main back cover includes a opening for part of the sub-cover to pass through and be exposed outside the opening.

Abstract: The present invention discloses a flat display device and a manufacture method thereof. The flat display device includes a flat display module, a front cover, an auxiliary support, a back cover set, and a circuit board. The back cover set includes a sub-cover and a main back cover, wherein the circuit board is disposed on the inner surface of the sub-cover. The front cover has a display opening for an active area of the flat display module to be exposed outside the display opening and present images through the display opening. The main back cover includes a opening for part of the sub-cover to pass through and be exposed outside the opening.

Abstract: The invention provides a method improving flexibility of at least one direct memory access (DMA) channel. The at least one DMA channel is used by a plurality of DMA engines of a first device to direct data transmission between the plurality of DMA engines of the first device and a second device. An explanatory embodiment of the method comprises: allowing any of a plurality of DMA engines to use any of the at least one DMA channels, and enabling some of the plurality of DMA engines to share a target channel if some of the plurality of DMA engines simultaneously compete for the target channel, one of the at least one DMA channel.

Abstract: The invention provides a method improving flexibility of at least one direct memory access (DMA) channel. The at least one DMA channel is used by a plurality of DMA engines of a first device to direct data transmission between the plurality of DMA engines of the first device and a second device. An explanatory embodiment of the method comprises: allowing any of a plurality of DMA engines to use any of the at least one DMA channels, and enabling some of the plurality of DMA engines to share a target channel if some of the plurality of DMA engines simultaneously compete for the target channel, one of the at least one DMA channel.

Abstract: A packet receiving-transmitting method is provided for use on a packet-switching network, such as Ethernet, for the purpose of handling packets more efficiently than the prior art. By this method, each received packet is stored in a packet buffer of a fixed size and associated with just one descriptor. Based on a threshold logical segmentation size determined by the network protocol, each packet buffer is partitioned into a plurality of segments, each having an ending point linked to an Early Receive/Transmit interrupt signal with the ending point of the packet buffer being linked to an OK interrupt signal. In response to each Early Receive/Transmit interrupt signal, the packet data stored are retrieved and forwarded; and in response to the OK interrupt signal, all the remaining packet data in the packet buffer are retrieved and forwarded. After this a write-back operation is performed on the associated descriptor so as to reset the descriptor to unused status.

Abstract: A method for solving a mismatched negotiation result between an auto-negotiation mode and an enforce mode in an Ethernet. The method is applied to a local device with an auto-negotiation mode, the local device is connected to a remote device, and the local device has a plurality of registers including at least an auto-negotiation advertisement register (ANAR) for recording information advertised to the remote device by the local device, and an auto-negotiation link partner ability register (ANLPAR) for recording an ability of the remote device. First, turn on the auto-negotiation mode. The contents of the ANAR register are set according to a transmission mode enforced by a user when the remote device is in the auto-negotiation mode, and then the auto-negotiation mode is restarted. Next, the contents of the ANAR and the ANLPAR registers are determined whether they are matched.

Abstract: A method of remote booting of a client computer in a LAN. The client computer downloads the drivers and the operating systems needed from the server through a coupled PCI network interface card. The driver is provided with a detecting program. When the client computer downloads and executes the first operating system, a hardware interrupt signal is cleared and the booting procedures can be completed successfully.

Abstract: A method of detecting peripheral components for a computer system to effectively start a driver of the peripheral component connected to the bus. By scanning all the buses orderly to detect the peripheral components connected to the buses, the peripheral components can be effectively used. The method can further be applied for the peripheral components connected to the PCI uses, the hierarchy structure formed by the PCI to PCI bridge to start the drivers of the peripheral components.

Abstract: A method for solving a mismatched negotiation result between an auto-negotiation mode and an enforce mode in an Ethernet. The method is applied to a local device with an auto-negotiation mode, the local device is connected to a remote device, and the local device has a plurality of registers including at least an auto-negotiation advertisement register (ANAR) for recording information advertised to the remote device by the local device, and an auto-negotiation link partner ability register (ANLPAR) for recording an ability of the remote device. First, turn on the auto-negotiation mode. The contents of the ANAR register are set according to a transmission mode enforced by a user when the remote device is in the auto-negotiation mode, and then the auto-negotiation mode is restarted. Next, the contents of the ANAR and the ANLPAR registers are determined whether they are matched.

Abstract: A packet receiving-transmitting method is provided for use on a packet-switching network, such as Ethernet, for the purpose of handling packets more efficiently than the prior art. By this method, each received packet is stored in a packet buffer of a fixed size and associated with just one descriptor. Based on a threshold determined by the network protocol, each packet buffer is partitioned into a plurality of segments, each having an ending point linked to an Early Receive/Transmit interrupt signal with the ending point of the packet buffer being linked to an OK interrupt signal. In response to each Early Receive/Transmit interrupt signal, the packet data stored are retrieved and forwarded; and in response to the OK interrupt signal, all the remaining packet data in the packet buffer are retrieved and forwarded. After this a write-back operation is performed on the associated descriptor so as to reset the descriptor to unused status.