Abstract: The present invention is directed to a single chip color CMOS image sensor with a novel two or more line reading structure which is compatible with MOS fabrication technology. The invention allows the simultaneous reading of line signals from two adjacent rows of pixels so that combinations of signals from pixels in adjacent rows may be obtained without the use of an external delay line device. The sensor includes a pixel array having superimposed thereon a color filter pattern and a two or more line reading structure. The reading structure includes sets of storage capacitors on which the pixel signals are stored, and a means for reading the signals from the capacitors in such a way that signals from pixels in adjacent rows may be combined. The reading structure is external to the pixel array but may still be fabricated on the same CMOS chip as the pixel array.

Abstract: The present invention is directed to a single-chip color CMOS image sensor with a novel two or more line reading structure which is compatible with MOS fabrication technology. The invention allows the simultaneous reading of line signals from two rows of pixels so that combinations of signals from pixels in different rows may be obtained without the use of an external delay line device. The sensor includes a pixel array having superimposed thereon a color filter pattern and a two or more line reading structure. The reading structure includes sets of storage capacitors on which the pixel signals are stored, and a means for reading the signals from the capacitors in such a way that signals from pixels in different rows may be combined. The reading structure is external to the pixel array but may still be fabricated on the same CMOS chip as the pixel array.

Abstract: An image acquisition and processing system that can eliminate or reduce the effects of offset voltage and threshold voltage is disclosed. The system contains a plurality of operational amplifiers each is used in an integrator. Each of the operational amplifiers has an offset voltage. The output of the integrator is sampled twice by a dual sampling circuit, one when connected to a photo-sensor and the other when not connected to the photo-sensor. The difference between the two samplings cancels out the effect of the offset voltage. The system also contains a plurality of transistors used as source follower. Each of the transistors is connected to an output terminal of the dual sampling circuit. These transistors have different threshold voltages. The output of a transistor is sampled. A predetermined voltage is then applied to the transistor and the output is again sampled. The difference between these two samples cancels out the effect of the threshold voltage.

Abstract: The present invention is directed to a single chip color MOS image sensor with a novel two-line reading structure which is compatible with MOS fabrication technology. The invention allows the simultaneous reading of line signals from two adjacent rows of pixels so that combinations of signals from pixels in adjacent rows may be obtained without the use of an external delay line device. The sensor includes a pixel array having superimposed thereon an improved color filter pattern and a two-line reading structure which may be doubled so as to provide four line signals. The reading structure includes sets of storage capacitors on which the pixel signals are stored, and a means for reading the signals from the capacitors in such a way that signals from pixels in adjacent rows may be combined. The approximate ratios of the colors in the improved color filter pattern are one-half green, one-fourth yellow, and one-fourth cyan.

Abstract: A charge amplifier with DC offset cancelling for use in a pixel element of an MOS image sensor is disclosed. The charge amplifier can be manufactured using a standard CMOS single polycrystalline process, making it much more cost effective than prior art designs. The charge amplifier includes an operational amplifier, a source capacitor, a series capacitor, and a feedback capacitor. The source capacitor holds the input signal. The output of the operational amplifier provides the output signal. Switches control the routing of the signal flow from the source capacitor, the series capacitor, and the feedback capacitor.

Abstract: A charge amplifier with DC offset canceling for use in a pixel element of an MOS image sensor is disclosed. The charge amplifier can be manufactured using a standard CMOS single polycrystalline process, making it much more cost effective than prior art designs. The charge amplifier includes an operational amplifier, a source capacitor, a series capacitor, and a feedback capacitor. The source capacitor holds the input signal. The output of the operational amplifier provides the output signal. Switches control the routing of the signal flow from the source capacitor, the series capacitor, and the feedback capacitor.

Abstract: A charge amplifier with DC offset cancelling for use in a pixel element of an MOS image sensor is disclosed. The charge amplifier can be manufactured using a standard CMOS single polycrystalline process, making it much more cost effective than prior art designs. The charge amplifier includes an operational amplifier, a source capacitor, a series capacitor, and a feedback capacitor. The source capacitor holds the input signal. The output of the operational amplifier provides the output signal. Switches control the routing of the signal flow from the source capacitor, the series capacitor, and the feedback capacitor.

Abstract: A CMOS, midpoint sense amplification system for controlling the dynamics of the sense amplification phase of the sense cycle of a CMOS DRAM. The system includes a tracking circuit for initiating the first stage of the sense amplification phase when the differential voltage signal attains a first predetermined value. Circuitry for controlling the sense amplification rate and equalizing current supplied to the source nodes during the first stage is disclosed. In one embodiment, circuitry for detecting when the amplitude of the signal has increased to a second predetermined value and for increasing the sense amplification rate during the second and third stages of the sense amplification phase is disclosed.