Patents by Inventor Tai-Hao PENG

Tai-Hao PENG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240186209
    Abstract: A semiconductor package structure includes a substrate, a semiconductor die, a molding material, an interposer, and a thermal via. The substrate has a wiring structure. The semiconductor die is disposed over the substrate and is electrically coupled to the wiring structure. The molding material surrounds the semiconductor die. The interposer is disposed over the semiconductor die. The thermal via is disposed in the interposer and extends to a bottom surface of the interposer. The thermal via vertically overlaps the semiconductor die.
    Type: Application
    Filed: November 1, 2023
    Publication date: June 6, 2024
    Inventors: Tai-Hao PENG, Yao-Tsung HUANG
  • Patent number: 12002711
    Abstract: Semiconductor devices and methods of forming semiconductor devices are provided. A method includes forming a first mask layer over a target layer, forming a plurality of spacers over the first mask layer, and forming a second mask layer over the plurality of spacers and patterning the second mask layer to form a first opening, where in a plan view a major axis of the opening extends in a direction that is perpendicular to a major axis of a spacer of the plurality of spacers. The method also includes depositing a sacrificial material in the opening, patterning the sacrificial material, etching the first mask layer using the plurality of spacers and the patterned sacrificial material, etching the target layer using the etched first mask layer to form second openings in the target layer, and filling the second openings in the target layer with a conductive material.
    Type: Grant
    Filed: May 27, 2022
    Date of Patent: June 4, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tai-Yen Peng, Wen-Yen Chen, Chih-Hao Chen
  • Publication number: 20240096860
    Abstract: A multi-die package on package includes a bottom package having a first device die and a second device die. A top package including a memory die is stacked on the bottom package.
    Type: Application
    Filed: August 14, 2023
    Publication date: March 21, 2024
    Applicant: MEDIATEK INC.
    Inventors: Tai-Hao Peng, Yao-Tsung Huang
  • Publication number: 20230387025
    Abstract: A semiconductor device includes a first layer structure, a second layer structure, a bridge die, a first SoC and a second SoC. The bridge die is disposed between the first layer structure and the second layer structure. The first SoC and the second SoC are disposed on the second layer structure. The first SoC and the second SoC are electrically connected through the bridge die.
    Type: Application
    Filed: March 28, 2023
    Publication date: November 30, 2023
    Inventors: Tai-Hao PENG, Yao-Tsung HUANG