Patents by Inventor Tai-Hong Chen

Tai-Hong Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11871810
    Abstract: A communication helmet includes a helmet, a fixing belt, and a speaker module. The helmet has a head cavity for protecting a human head. Such helmet may be any known or new types of helmets for protecting soldiers, riders, policemen, working men in architecture building or in another engineering facilities, or for any other purposes and uses. The fixing belt has two belt ends connecting to two sides of the helmet. The fixing belt and the helmet together form a head container for fitting the human head.
    Type: Grant
    Filed: July 10, 2020
    Date of Patent: January 16, 2024
    Inventor: Tai Hong Chen
  • Publication number: 20200383419
    Abstract: A communication helmet includes a helmet, a fixing belt, and a speaker module. The helmet has a head cavity for protecting a human head. Such helmet may be any known or new types of helmets for protecting soldiers, riders, policemen, working men in architecture building or in another engineering facilities, or for any other purposes and uses. The fixing belt has two belt ends connecting to two sides of the helmet. The fixing belt and the helmet together form a head container for fitting the human head.
    Type: Application
    Filed: July 10, 2020
    Publication date: December 10, 2020
    Inventor: TAI HONG CHEN
  • Patent number: 8604613
    Abstract: An electronic device comprises a substrate and a number of bump units over the substrate, wherein each of the bump units includes an electrically insulating bump-forming body extending in a first direction, and at least two conductive layers separated from each other on the electrically insulating bump-forming body, the at least two conductive layers extending in a second direction orthogonal to the first direction.
    Type: Grant
    Filed: September 25, 2008
    Date of Patent: December 10, 2013
    Assignee: Industrial Technology Research Institute
    Inventors: Su-Tsai Lu, Tai-Hong Chen
  • Patent number: 8247908
    Abstract: A circuit substrate and the method for fabricating a packaging of the circuit substrate are provided. A plurality of electrodes are formed on the surface of the circuit substrate, the electrodes are formed with fork structures over an connection section of the circuit substrate, so that when the circuit substrate expands/contracts due to thermal processes, the probability of alignment with electrodes of an external circuit board is increased by easily detaching the fork structure overlapping an electrode of the external circuit board which is not corresponding to the fork structure of the electrode of the circuit substrate, so as to avoid short circuit. Thus, electrode misalignment due to electrode pitch variation of the traditional circuit substrate as a result of thermal deformation can be effectively eliminated.
    Type: Grant
    Filed: July 26, 2010
    Date of Patent: August 21, 2012
    Assignee: Industrial Technology Research Institute
    Inventors: Yao-Sheng Lin, Tai-Hong Chen
  • Patent number: 8023060
    Abstract: A flexible display including a flexible display panel and a flexible hollow supporting structure is provided. The flexible display panel has a first end and a second end opposite to each other. The flexible hollow supporting structure is integrated with the flexible display panel and extends from the first end to the second end of the flexible display panel. In addition, a supporting medium can be infused into the flexible hollow supporting structure so as to stretch and support the flexible display panel.
    Type: Grant
    Filed: October 28, 2007
    Date of Patent: September 20, 2011
    Assignee: Industrial Technology Research Institute
    Inventors: Yao-Sheng Lin, Tai-Hong Chen, Su-Yu Fun
  • Publication number: 20100283159
    Abstract: A circuit substrate and the method for fabricating a packaging of the circuit substrate are provided. A plurality of electrodes are formed on the surface of the circuit substrate, the electrodes are formed with fork structures over an connection section of the circuit substrate, so that when the circuit substrate expands/contracts due to thermal processes, the probability of alignment with electrodes of an external circuit board is increased by easily detaching the fork structure overlapping an electrode of the external circuit board which is not corresponding to the fork structure of the electrode of the circuit substrate, so as to avoid short circuit. Thus, electrode misalignment due to electrode pitch variation of the traditional circuit substrate as a result of thermal deformation can be effectively eliminated.
    Type: Application
    Filed: July 26, 2010
    Publication date: November 11, 2010
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yao-Sheng LIN, Tai-Hong CHEN
  • Publication number: 20090026611
    Abstract: An electronic device comprises a substrate and a number of bump units over the substrate, wherein each of the bump units includes an electrically insulating bump-forming body extending in a first direction, and at least two conductive layers separated from each other on the electrically insulating bump-forming body, the at least two conductive layers extending in a second direction orthogonal to the first direction.
    Type: Application
    Filed: September 25, 2008
    Publication date: January 29, 2009
    Inventors: Su-Tsai Lu, Tai-Hong Chen
  • Publication number: 20080198541
    Abstract: A flexible display including a flexible display panel and a flexible hollow supporting structure is provided. The flexible display panel has a first end and a second end opposite to each other. The flexible hollow supporting structure is integrated with the flexible display panel and extends from the first end to the second end of the flexible display panel. In addition, a supporting medium can be infused into the flexible hollow supporting structure so as to stretch and support the flexible display panel.
    Type: Application
    Filed: October 28, 2007
    Publication date: August 21, 2008
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yao-Sheng Lin, Tai-Hong Chen, Su-Yu Fun
  • Patent number: 7378746
    Abstract: A composite bump suitable for disposing on a substrate pad is provided. The composite bump includes a compliant body and an outer conductive layer. The coefficient of thermal expansion (CTE) of the compliant body is between 5 ppm/° C. and 200 ppm/° C. The outer conductive layer covers the compliant body and is electrically connected to the pad. The compliant body can provide a stress buffering effect for a bonding operation. Furthermore, by setting of the CTE of the compliant body within a preferable range, damages caused by thermal stress are reduced while the bonding effect is enhanced.
    Type: Grant
    Filed: March 10, 2006
    Date of Patent: May 27, 2008
    Assignee: Industrial Technology Research Institute
    Inventors: Ji-Cheng Lin, Yao-Sheng Lin, Shyh-Ming Chang, Su-Tsai Lu, Hsien-Chie Cheng, Tai-Hong Chen
  • Publication number: 20070210457
    Abstract: A composite bump suitable for disposing on a substrate pad is provided. The composite bump includes a compliant body and an outer conductive layer. The coefficient of thermal expansion (CTE) of the compliant body is between 5 ppm/° C. and 200 ppm/° C. The outer conductive layer covers the compliant body and is electrically connected to the pad. The compliant body can provide a stress buffering effect for a bonding operation. Furthermore, by setting of the CTE of the compliant body within a preferable range, damages caused by thermal stress are reduced while the bonding effect is enhanced.
    Type: Application
    Filed: March 10, 2006
    Publication date: September 13, 2007
    Inventors: Ji-Cheng Lin, Yao-Sheng Lin, Shyh-Ming Chang, Su-Tsai Lu, Hsien-Chie Cheng, Tai-Hong Chen
  • Publication number: 20070170523
    Abstract: A circuit substrate and its packaging and the method for fabricating the packaging are provided. A plurality of electrodes are formed on the surface of the circuit substrate, the electrodes are formed with fork structures, so that when the circuit substrate expands/contracts due to thermal processes, such that the probability of alignment with electrodes of an external circuit board is increased. Meanwhile, overlapping portions of the fork structures with the electrodes of the circuit board can be cut away to avoid short circuit. Thus, electrode misalignment due to electrode pitch variation of the traditional circuit substrate as a result of thermal deformation can be effectively eliminated.
    Type: Application
    Filed: August 30, 2006
    Publication date: July 26, 2007
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yao-Sheng Lin, Tai-Hong Chen
  • Patent number: 6767818
    Abstract: A method for forming electrically conductive bumps on a semiconductor substrate, or a semiconductor wafer and devices formed by the method are disclosed. In the method, a wafer that has an active surface, a plurality of conductive elements formed on the active surface and a passivation layer insulating the plurality of conductive bumps from each other is first provided. A first metal layer is then sputter deposited on top of the plurality of conductive elements and the passivation layer, followed by stencil printing a plurality of bumps of an insulating material on top of each one of the plurality of conductive elements. The plurality of bumps may be heat treated to a temperature of at least 100° C. for a period of at least 10 minutes for stress relief. A second metal layer is then sputter deposited on top of the plurality of bumps and the first metal layer.
    Type: Grant
    Filed: August 7, 2000
    Date of Patent: July 27, 2004
    Assignee: Industrial Technology Research Institute
    Inventors: Shyh-Ming Chang, Tai-Hong Chen, Yu-Te Hsieh, Chun-Ming Huang, Jui Ming Ni, Ching-Yun Chang, Jwo-Huei Jou
  • Patent number: 6501525
    Abstract: A method for simultaneously forming a flat display panel and bonding to a printed circuit board is disclosed in which a silicon wafer is first supplied and then coated with an alignment layer, a multiplicity of spacers are then mounted to the wafer before it is severed into a multiplicity of dies. A frame seal is then applied to the periphery of the die, while a multiplicity of metal leads is formed on the die for electrical communication with a multiplicity of thin film transistors. A glass plate is then assembled to the silicon substrate by the frame seal, while simultaneously bonded to a printed circuit board in a bonder apparatus under pressure by utilizing a conductive material such as silver paste, an anisotropic conductive film or an isotropic conductive adhesive.
    Type: Grant
    Filed: December 8, 2000
    Date of Patent: December 31, 2002
    Assignee: Industrial Technology Research Institute
    Inventors: Yuan-Chang Huang, Tai-Hong Chen
  • Publication number: 20020071085
    Abstract: A method for simultaneously forming a flat display panel and bonding to a printed circuit board is disclosed in which a silicon wafer is first supplied and then coated with an alignment layer, a multiplicity of spacers are then mounted to the wafer before it is severed into a multiplicity of dies. A frame seal is then applied to the periphery of the die, while a multiplicity of metal leads is formed on the die for electrical communication with a multiplicity of thin film transistors. A glass plate is then assembled to the silicon substrate by the frame seal, while simultaneously bonded to a printed circuit board in a bonder apparatus under pressure by utilizing a conductive material such as silver paste, an anisotropic conductive film or an isotropic conductive adhesive.
    Type: Application
    Filed: December 8, 2000
    Publication date: June 13, 2002
    Applicant: Industrial Technology Research Institute
    Inventors: Yuan-Chang Huang, Tai-Hong Chen
  • Patent number: 5906725
    Abstract: A zinc-containing waste article is recycled by a method in which the zinc of the waste article is recovered in a molten state while the unmolten nickel/copper electroplating layer of the waste article is dissolved in an acidic solution to form a nickel-zinc alloy or a nickel-zinc-copper alloy electroplating solution.
    Type: Grant
    Filed: June 23, 1997
    Date of Patent: May 25, 1999
    Assignee: Industrial Technology Research Institute
    Inventors: Jing-Chie Lin, Jyh-Yeong Lin, Tai-Hong Chen, Fong-Ru Yang, Jyh-Herng Chen
  • Patent number: 5888373
    Abstract: A method for preparing a nickel-zinc-copper or nickel-zinc alloy electroplating solution from at least one electroplating waste solution and/or at least one acidic leach solution of metal scrap containing nickel and/or zinc ions is disclosed. The method involves mixing two or more than two of solutions of the electroplating waste solutions and the acidic leach solutions, and optionally water, so that the ion concentrations of Ni, Zn, Cu, Fe, Cr and Pb of the resulting mixed solution are within the following ion concentrations:15 gdm.sup.-3 <Ni.sup.2+ <58 gdm.sup.-3, 28 gdm.sup.-3 <Zn.sup.2+ <44 gdm.sup.-3, 0<Cu.sup.2+ <1430 gm.sup.-3, 0<Fe.sup.2+ +Fe.sup.3+<5000 gm.sup.-3, 0<Cr.sup.3+ <1000 gm.sup.-3 and 0<Pb.sup.2+ <50 gm.sup.-3.
    Type: Grant
    Filed: June 23, 1997
    Date of Patent: March 30, 1999
    Assignee: Industrial Technology Research Institute
    Inventors: Jin-Chie Lin, Chih-Chia Chen, Tai-Hong Chen, Fong-Ru Yang, Jyh-Herng Chen