Abstract: An analog-to-digital conversion device and analog-to-digital conversion method thereof are provided. The analog-to-digital conversion device includes an analog circuit configured to output an analog input signal, and an analog-to-digital converter configured to receive the analog input signal and configured to outputting a digital output signal corresponding to the analog input signal with the use of first and second capacitor arrays, each of the first and second capacitor arrays including a first capacitor having a calibration capacitor connected thereto and a second capacitor having no calibration capacitor connected thereto, wherein the analog-to-digital converter is configured to calibrate the capacitance of the first capacitor by providing a first calibration voltage to the calibration capacitor and is configured to output the digital output signal corresponding to the analog input signal with the use of the calibrated capacitance of the first capacitor.

Abstract: An analog-to-digital conversion device and analog-to-digital conversion method thereof are provided. The analog-to-digital conversion device includes an analog circuit configured to output an analog input signal, and an analog-to-digital converter configured to receive the analog input signal and configured to outputting a digital output signal corresponding to the analog input signal with the use of first and second capacitor arrays, each of the first and second capacitor arrays including a first capacitor having a calibration capacitor connected thereto and a second capacitor having no calibration capacitor connected thereto, wherein the analog-to-digital converter is configured to calibrate the capacitance of the first capacitor by providing a first calibration voltage to the calibration capacitor and is configured to output the digital output signal corresponding to the analog input signal with the use of the calibrated capacitance of the first capacitor.

Abstract: A data driver includes a digital to analog converter configured to receive a reference gray voltage and image data, and configured to generate gray voltages corresponding to the image data, and an output buffer including a plurality of buffer circuits connected to an output terminal of the digital to analog converter, and configured to selectively receive one of the gray voltages.

Abstract: A data driver includes a digital to analog converter configured to receive a reference gray voltage and image data, and configured to generate gray voltages corresponding to the image data, and an output buffer including a plurality of buffer circuits connected to an output terminal of the digital to analog converter, and configured to selectively receive one of the gray voltages.

Abstract: A data driver includes a ramp signal generator generating a first ramp signal and a second ramp signal, a counter generating a count signal based on a clock signal, and channels each generating a data signal based on the first ramp signal, the second ramp signal, and the count signal. Each channel includes a latch circuit dividing the image data into a first partial data and a second partial data and latching the first and the second partial data, a duplication driver generating first and second reference signals by duplicating the first and second ramp signals, a digital-analog converter generating a driving signal corresponding to a first partial data based on the first and second reference signals, and an output circuit sampling the driving signal by comparing the second partial data with the count signal to output the data signal.

Abstract: A data driver includes a digital to analog converter configured to receive a reference gray voltage and image data, and configured to generate gray voltages corresponding to the image data, and an output buffer including a plurality of buffer circuits connected to an output terminal of the digital to analog converter, and configured to selectively receive one of the gray voltages.

Abstract: A data driver includes a digital to analog converter configured to receive a reference gray voltage and image data, and configured to generate gray voltages corresponding to the image data, and an output buffer including a plurality of buffer circuits connected to an output terminal of the digital to analog converter, and configured to selectively receive one of the gray voltages.

Abstract: A data driver includes a digital to analog converter configured to receive a reference gray voltage and image data, and configured to generate gray voltages corresponding to the image data, and an output buffer including a plurality of buffer circuits connected to an output terminal of the digital to analog converter, and configured to selectively receive one of the gray voltages.

Abstract: A digital-to-analog converter may include a converting unit and a distributing unit. The converting unit may generate a first analog signal set based on less-than-all bits of an image data set in a first period and may generate a second analog signal set based on all bits of the image data set in a second period. The all bits may include at least 2 bits. The distributing unit may include output terminals, may distribute the first analog signal set to the output terminals in a first sequence in the first period, and may distribute the second analog signal to the output terminals in a second sequence. The second sequence may be opposite to the first sequence.

Abstract: A data driver includes a ramp signal generator generating a first ramp signal and a second ramp signal, a counter generating a count signal based on a clock signal, and channels each generating a data signal based on the first ramp signal, the second ramp signal, and the count signal. Each channel includes a latch circuit dividing the image data into a first partial data and a second partial data and latching the first and the second partial data, a duplication driver generating first and second reference signals by duplicating the first and second ramp signals, a digital-analog converter generating a driving signal corresponding to a first partial data based on the first and second reference signals, and an output circuit sampling the driving signal by comparing the second partial data with the count signal to output the data signal.

Abstract: A digital-to-analog converter may include a converting unit and a distributing unit. The converting unit may generate a first analog signal set based on less-than-all bits of an image data set in a first period and may generate a second analog signal set based on all bits of the image data set in a second period. The all bits may include at least 2 bits. The distributing unit may include output terminals, may distribute the first analog signal set to the output terminals in a first sequence in the first period, and may distribute the second analog signal to the output terminals in a second sequence. The second sequence may be opposite to the first sequence.

Abstract: A data driver includes a digital to analog converter configured to receive a reference gray voltage and image data, and configured to generate gray voltages corresponding to the image data, and an output buffer including a plurality of buffer circuits connected to an output terminal of the digital to analog converter, and configured to selectively receive one of the gray voltages.

Abstract: A multicore interface with dynamic task management capability and a task loading and offloading method thereof are provided. The method disposes a communication interface between a micro processor unit (MPU) and a digital signal processor (DSP) and dynamically manages tasks assigned by the MPU to the DSP. First, an idle processing unit of the DSP is searched, and then one of a plurality of threads of the task is assigned to the processing unit. Finally, the processing unit is activated to execute the thread. Accordingly, the communication efficiency of the multicore processor can be effectively increased while the hardware cost can be saved.

Abstract: A packing member for packing an article includes a medium accommodating portion accommodating medium, a non-return valve for passing the medium toward the medium accommodating portion along a longitudinal direction of the medium accommodating portion and for stopping the medium in an opposite direction away from the medium accommodating portion, and a flow path, formed by welding the non-return valve to the medium accommodating portion, for passing the medium. The flow path includes a reference flow path portion extending in the longitudinal direction and an expanding flow path portion having a width larger than that of the reference flow path portion.

Abstract: A packing member for packing an article, the packing member includes a medium accommodating portion accommodating medium; a non-return valve for passing the medium toward the medium accommodating portion along a longitudinal direction of the medium accommodating portion and for stopping the medium in an opposite direction away from the medium accommodating portion; and a flow path, formed by welding the non-return valve to the medium accommodating portion, for passing the medium, the flow path including a reference flow path portion extending in the longitudinal direction and an expanding flow path portion having a width larger than that of the reference flow path portion.

Abstract: A multicore interface with dynamic task management capability and a task loading and offloading method thereof are provided. The method disposes a communication interface between a micro processor unit (MPU) and a digital signal processor (DSP) and dynamically manages tasks assigned by the MPU to the DSP. First, an idle processing unit of the DSP is searched, and then one of a plurality of threads of the task is assigned to the processing unit. Finally, the processing unit is activated to execute the thread. Accordingly, the communication efficiency of the multicore processor can be effectively increased while the hardware cost can be saved.

Abstract: A connector for module that connects a module to a printed circuit board in a position wherein the board plane of the module is approximately parallel to the printed circuit board.