Abstract: A channel hiatus correction method for an HDMI device is provided. A recovery code from scrambled data of the stream is obtained. A liner feedback shift register (LFSR) value of channels of the HDMI port is obtained based on the recovery code and the scrambled data of the stream. The stream is de-scrambled according to the LFSR value of the channels of the HDMI port. Video data is displayed according to the de-scrambled stream.

Abstract: A neural network is used to place macros on a chip canvas in an integrated circuit (IC) design. The macros are first clustered into multiple macro clusters. Then the neural network generates a probability distribution over locations on a grid and aspect ratios of a macro cluster. The grid represents the chip canvas and is formed by rows and columns of grid cells. The macro cluster is described by at least an area size, aspect ratios, and wire connections. Action masks are generated for respective ones of the aspect ratios to block out a subset of unoccupied grid cells based on design rules that optimize macro placement. Then, by applying the action masks on the probability distribution, a masked probability distribution is generated. Based on the masked probability distribution, a location on the grid is selected for placing the macro cluster with a chosen aspect ratio.

Abstract: A neural network based method places flexible blocks on a chip canvas in an integrated circuit (IC) design. The neural network receives an input describing geometric features of a flexible block to be placed on the chip canvas. The geometric features includes an area size and multiple aspect ratios. The neural network generates a probability distribution over locations on the chip canvas and the aspect ratios of the flexible block. Based on the probability distribution, a location on the chip canvas is selected for placing the flexible block with a chosen aspect ratio.

Abstract: A power-saving method for an HDMI device is provided. The method includes detecting color depth information of video data from an HDMI source which is connected to the HDMI port, deriving a horizontal length for each line by fragment of a picture frame according to the color depth information, generating a plurality of synchronization signals according to the horizontal length for each line by fragment, and powering on the HDMI port, according to the synchronization signals, for a predetermined time period to obtain encrypted information from the HDMI source, and powering off the HDMI port after the predetermined time period.

Abstract: A power-saving method for switching High Definition Multimedia Interface (HDMI) ports on a sink device is provided. The sink device has a first HDMI port initially being enabled for displaying and a second HDMI port being disabled for displaying. The power-saving method includes the steps of using the reference signals to locate the VSYNC active edge in each frame generated by a source device connected to the second HDMI port; turning on the power to the second HDMI port during a power-on region corresponding to the VSYNC active edge in each frame and turning off power otherwise; obtaining information related to a high bandwidth digital content protection (HDCP) in the power-on region; and displaying video data from the source device based on the HDCP information when enabling the second HDMI port connected to the source device.

Abstract: A word boundary detection method includes receiving a data stream from a data channel of a high definition multimedia interface (HDMI), and performing pattern matching upon the data stream to identify a word boundary between two consecutive codewords transmitted via the data stream. Known codewords of scrambled control vectors are involved in the pattern matching.

Abstract: A word boundary detection method includes receiving a data stream from a data channel of a high definition multimedia interface (HDMI), and performing pattern matching upon the data stream to identify a word boundary between two consecutive codewords transmitted via the data stream. Known codewords of scrambled control vectors are involved in the pattern matching.

Abstract: A notch filter appropriately adjusts the amount of attenuation at a center frequency of its notch band through changing or adjusting a value of an adjustable parameter A, and adaptively controls the amount of signal attenuation of a predetermined frequency component for an input signal that passes the notch filter, so as to partially suppress or partially attenuates the predetermined frequency component without affecting the size of a bandwidth of the notch filter.

Abstract: A carrier frequency offset (CFO) estimation device includes an echo cancelling unit, performing echo cancellation on an input signal to generate an echo-cancelled signal; and a CFO estimating unit, performing CFO estimation on the echo-cancelled signal to generate an estimated CFO.

Abstract: An apparatus for estimating a carrier frequency offset (CFO) is provided. A differential correlation calculation is performed on a received signal and a reference signal to generate multiple calculation results. One among M number of peak values with largest amplitudes determined from the calculation results is selected as a candidate peak value and outputted each time. A data capturing circuit captures from the received signal a data segment corresponding to the candidate peak value as a candidate data segment. A fast Fourier transform (FFT) circuit performs FFT on a product of the candidate data segment and a conjugate signal of reference data to obtain a candidate transform result. A selecting circuit determines whether to select the candidate transform result as a target transform result. The CFO calculating circuit determines an estimated CFO according to a frequency corresponding to the largest amplitude in the target transform result.

Abstract: A television signal receiving apparatus cooperating with a front-end circuit in a frequency division full-duplex satellite television system is provided. A digital-to-analog conversion circuit receives a request signal to be sent to the front-end circuit, and outputs an analog request signal. A multi-node low-pass filter has a first node, a second node and a third node. The first node is electrically coupled to an output end of the digital-to-analog conversion circuit. The third node is electrically coupled to the front-end circuit. The multi-node low-pass filter filters out high-frequency signals coupled from the first node and the third node to the second node, and further filters out high-frequency signals coupled from the first node to the third node. A command parsing circuit receives a filtered signal from the second node, and processes and parses the filtered signal.

Abstract: A receiver includes a gain adjusting circuit and a timing control circuit. The gain adjusting circuit adjusts the strength of an input signal according to a gain value to generate an adjusted input signal. The timing control circuit generates a control signal according to the input signal or the adjusted input signal to determine a time point at which the gain adjusting circuit changes the gain value.

Abstract: A circuit applied to a display apparatus includes a first noise variance estimation circuit, an impulsive interference determination circuit, a second noise variance circuit and a selection circuit. The first noise variance estimation circuit calculates a first noise variance of an input signal. The impulsive interference determination circuit determines whether the input signal has impulsive interference according to the first noise variance to generate a detection result. The second noise variance estimation circuit calculates a second noise variance based on the input signal. The selection circuit selectively outputs one of the first noise variance and the second noise variance according to the detection result.

Abstract: An automatic gain control apparatus includes an amplitude detecting circuit, a distortion detecting circuit, a gain determining circuit and an amplifying circuit. The amplifying circuit applies a gain to an input signal to generate an output signal. The amplitude detecting circuit detects an average amplitude of the input signal. The distortion detecting circuit detects a distortion level of the output signal. The gain determining circuit determines the gain used by the amplifying circuit according to the average amplitude and the distortion level.

Abstract: A direct current (DC) removal circuit is coupled to a radio-frequency (RF) module, which includes a local oscillator. The DC removal circuit includes: a waveform generator, generating a digital waveform signal having an average value that is smaller than a resolution of a converter coupled to the RF module; a digital adder, coupled to the waveform generator, adding the digital waveform signal to a digital DC value to generate an addition result; and a digital subtractor, subtracting the addition result from a digital signal to generate a subtraction result, so as to compensate leakage caused by the local oscillator.

Abstract: A phase recovery device includes a phase recovery module and a residual phase recovery module. The phase recovery module performs a first-stage phase recovery on a received signal to generate a first phase recovered signal. The residual phase recovery module performs a second-stage phase recovery on the first phase-recovered signal to generate a second phase recovered signal.

Abstract: A decoding circuit applied to a multimedia apparatus is provided. The decoding circuit is for decoding encoded data to generate system information, and includes multiple processing circuits and a determination circuit. The multiple processing circuits individually process the encoded data to generate multiple processed signals, and respectively correspond to multiple bit combinations of a part of the system information. The determination circuit determines the system information according to the multiple processed signals.

Abstract: A channel estimation circuit includes a pilot buffer, an interference indication buffer and a channel information calculation circuit. The pilot buffer stores channel information of multiple pilot cells in multiple symbols. The interference indication buffer stores interference indication information, which indicates whether the multiple symbols are affected by interference. The channel information calculation circuit, coupled to the pilot buffer and the interference indication buffer, estimates, based on channel information of a part of the multiple pilot cells in the multiple symbols, channel information of a data cell in the multiple symbols according to the interference indication information. The part of the multiple pilot cells do not include pilot cells of any symbol affected by interference.

Abstract: A signal receiving apparatus includes a phase recovery look, a phase estimation circuit, a phase noise detection circuit, and a bandwidth setting circuit. The phase recovery loop performs a phase recovery process on an input signal according to a bandwidth setting. The phase estimation circuit generates an estimated phase associated with the input signal. The phase noise detection circuit determines a phase noise amount according to the estimated phase. The bandwidth setting circuit calculates an average and a variance of the phase noise amounts, and adjusts the bandwidth setting of the phase recovery loop according to the average and the variance.

Abstract: A symbol rate estimation device includes: a power spectrum density (PSD) generating unit, estimating a power of an input signal to generate a PSD; a cut-off frequency index outputting unit, outputting a cut-off frequency index according to the power; and a symbol rate calculating unit, calculating a symbol rate of the input signal according to the cut-off frequency index.