Patents by Inventor Tai-Peng Lee

Tai-Peng Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7371695
    Abstract: A method for manufacturing a low temperature removable silicon dioxide hard mask for patterning and etching is provided, wherein tetra-ethyl-ortho-silane (TEOS) is used to deposit a silicon dioxide hard mask.
    Type: Grant
    Filed: January 4, 2006
    Date of Patent: May 13, 2008
    Assignee: ProMos Technologies Pte. Ltd.
    Inventors: Tai-Peng Lee, Barbara Haselden
  • Publication number: 20070290292
    Abstract: A method for manufacturing a low temperature removable silicon dioxide hard mask for patterning and etching is provided, wherein tetra-ethyl-ortho-silane (TEOS) is used to deposit a silicon dioxide hard mask.
    Type: Application
    Filed: July 19, 2007
    Publication date: December 20, 2007
    Inventors: Tai-Peng Lee, Barbara Haselden
  • Patent number: 7265015
    Abstract: Chlorine is incorporated into pad oxide (110) formed on a silicon substrate (120) before the etch of substrate isolation trenches (134). The chlorine enhances the rounding of the top corners (140C) of the trenches when a silicon oxide liner (150.1) is thermally grown on the trench surfaces. A second silicon oxide liner (150.2) incorporating chlorine is deposited by CVD over the first liner (150.1), and then a third liner (150.3) is thermally grown. The chlorine concentration in the second liner (150.2) and the thickness of the three liners (150.1, 150.2, 150.3) are controlled to improve the corner rounding without consuming too much of the active areas (140).
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: September 4, 2007
    Assignee: ProMOS Technologies Inc.
    Inventors: Zhong Dong, Tai-Peng Lee
  • Publication number: 20070155189
    Abstract: A method for manufacturing a low temperature removable silicon dioxide hard mask for patterning and etching is provided, wherein tetra-ethyl-ortho-silane (TEOS) is used to deposit a silicon dioxide hard mask.
    Type: Application
    Filed: January 4, 2006
    Publication date: July 5, 2007
    Inventors: Tai-Peng Lee, Barbara Haselden
  • Publication number: 20070128800
    Abstract: Chlorine is incorporated into pad oxide (110) formed on a silicon substrate (120) before the etch of substrate isolation trenches (134). The chlorine enhances the rounding of the top corners (140C) of the trenches when a silicon oxide liner (150.1) is thermally grown on the trench surfaces. A second silicon oxide liner (150.2) incorporating chlorine is deposited by CVD over the first liner (150.1), and then a third liner (150.3) is thermally grown. The chlorine concentration in the second liner (150.2) and the thickness of the three liners (150.1, 150.2, 150.3) are controlled to improve the corner rounding without consuming too much of the active areas (140).
    Type: Application
    Filed: February 6, 2007
    Publication date: June 7, 2007
    Inventors: Zhong Dong, Tai-Peng Lee
  • Publication number: 20070004136
    Abstract: Chlorine is incorporated into pad oxide (110) formed on a silicon substrate (120) before the etch of substrate isolation trenches (134). The chlorine enhances the rounding of the top corners (140C) of the trenches when a silicon oxide liner (150.1) is thermally grown on the trench surfaces. A second silicon oxide liner (150.2) incorporating chlorine is deposited by CVD over the first liner (150.1), and then a third liner (150.3) is thermally grown. The chlorine concentration in the second liner (150.2) and the thickness of the three liners (150.1, 150.2, 150.3) are controlled to improve the corner rounding without consuming too much of the active areas (140).
    Type: Application
    Filed: June 30, 2005
    Publication date: January 4, 2007
    Inventors: Zhong Dong, Tai-Peng Lee
  • Patent number: 7087998
    Abstract: A method for controlling the position of air gaps in intermetal dielectric layers between conductive lines and a structure formed using such a method. A first dielectric layer is deposited over at least two features and a substrate and an air gap is formed between the at least two features and above the feature height. The first dielectric layer is etched between the at least two features to open the air gap. Then a second dielectric layer is deposited over the etched first dielectric layer to form an air gap between the at least two features and completely below the feature height.
    Type: Grant
    Filed: August 17, 2004
    Date of Patent: August 8, 2006
    Assignee: ProMOS Technology, Inc.
    Inventors: Tai-Peng Lee, Ching-Yueh Hu, Chuck Jang
  • Patent number: 7026172
    Abstract: A high density plasma chemical vapor deposition (HDP-CVD) process is used to deposit silicon dioxide in trenches of various widths. The thickness of the silicon dioxide filling both narrow and wide trenches is made more uniform by reducing an HDP-CVD etch to deposition ratio. The lowered etch to deposition ratio is achieved by lowering a ratio of oxygen to silane gas, by lowering the power of a high frequency bias signal, and by lowering the total gas flow rate.
    Type: Grant
    Filed: October 22, 2001
    Date of Patent: April 11, 2006
    Assignee: ProMOS Technologies, Inc.
    Inventors: Tai-Peng Lee, Chuck Jang
  • Patent number: 6933218
    Abstract: An OXO-type inter-poly insulator (where X is a high-K metal oxide and O is an insulative oxide) is defined by forming an amorphous metal oxide layer on a silicon-based insulator (e.g., a silicon oxide layer) and then nitridating at least upper and lower sub-layers of the amorphous metal oxide with a low temperature plasma treatment that maintains temperature below the recrystallization temperature of the amorphous material. Such a plasma treatment has been found to improve breakdown voltage characteristics of the insulator. In one embodiment, the metal oxide includes aluminum oxide and it is fluorinated with low temperature plasma prior to nitridation.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: August 23, 2005
    Assignee: Mosel Vitelic, Inc.
    Inventors: Tai-Peng Lee, Barbara Haselden
  • Patent number: 6924241
    Abstract: A method for producing an ultraviolet light (UV) transmissive silicon nitride layer in a plasma enhanced chemical vapor deposition (PECVD) reactor is presented. The UV transmissive film is produced by reducing, in comparison to a standard silicon nitride process, a flow rate of the silane and ammonia gas precursors to the PECVD reactor, and significantly increasing a flow rate of nitrogen gas to the reactor. The process reduces the concentration of Si—H bonds in the silicon nitride film to provide UV transmissivity. Further, the amount of nitrogen in the film is greater than in a standard PECVD silicon nitride film, and as a percentage constitutes a greater part of the film than silicon. The film has excellent step coverage and a low number of pinhole defects. The film may be used as a passivation layer in a UV erasable memory integrated circuit.
    Type: Grant
    Filed: February 24, 2003
    Date of Patent: August 2, 2005
    Assignee: ProMOS Technologies, Inc.
    Inventor: Tai-Peng Lee
  • Patent number: 6881668
    Abstract: A method for controlling the position of air gaps in intermetal dielectric layers between conductive lines and a structure formed using such a method. A first dielectric layer is deposited over at least two features and a substrate and an air gap is formed between the at least two features and above the feature height. The first dielectric layer is etched between the at least two features to open the air gap. Then a second dielectric layer is deposited over the etched first dielectric layer to form an air gap between the at least two features and completely below the feature height.
    Type: Grant
    Filed: September 5, 2003
    Date of Patent: April 19, 2005
    Assignee: Mosel Vitel, Inc.
    Inventors: Tai-Peng Lee, Ching-Yueh Hu, Chuck Jang
  • Publication number: 20050051865
    Abstract: A method for controlling the position of air gaps in intermetal dielectric layers between conductive lines and a structure formed using such a method. A first dielectric layer is deposited over at least two features and a substrate and an air gap is formed between the at least two features and above the feature height. The first dielectric layer is etched between the at least two features to open the air gap. Then a second dielectric layer is deposited over the etched first dielectric layer to form an air gap between the at least two features and completely below the feature height.
    Type: Application
    Filed: August 17, 2004
    Publication date: March 10, 2005
    Inventors: Tai-Peng Lee, Ching-Yueh Hu, Chuck Jang
  • Publication number: 20050051864
    Abstract: A method for controlling the position of air gaps in intermetal dielectric layers between conductive lines and a structure formed using such a method. A first dielectric layer is deposited over at least two features and a substrate and an air gap is formed between the at least two features and above the feature height. The first dielectric layer is etched between the at least two features to open the air gap. Then a second dielectric layer is deposited over the etched first dielectric layer to form an air gap between the at least two features and completely below the feature height.
    Type: Application
    Filed: September 5, 2003
    Publication date: March 10, 2005
    Inventors: Tai-Peng Lee, Ching-Yueh Hu, Chuck Jang
  • Publication number: 20040166696
    Abstract: A method for producing an ultraviolet light (UV) transmissive silicon nitride layer in a plasma enhanced chemical vapor deposition (PECVD) reactor is presented. The UV transmissive film is produced by reducing, in comparison to a standard silicon nitride process, a flow rate of the silane and ammonia gas precursors to the PECVD reactor, and significantly increasing a flow rate of nitrogen gas to the reactor. The process reduces the concentration of Si—H bonds in the silicon nitride film to provide UV transmissivity. Further, the amount of nitrogen in the film is greater than in a standard PECVD silicon nitride film, and as a percentage constitutes a greater part of the film than silicon. The film has excellent step coverage and a low number of pinhole defects. The film may be used as a passivation layer in a UV erasable memory integrated circuit.
    Type: Application
    Filed: February 24, 2003
    Publication date: August 26, 2004
    Applicant: Mosel Vitelic, Inc.
    Inventor: Tai-Peng Lee
  • Publication number: 20030077888
    Abstract: A high density plasma chemical vapor deposition (HDP-CVD) process is used to deposit silicon dioxide in trenches of various widths. The thickness of the silicon dioxide filling both narrow and wide trenches is made more uniform by reducing an HDP-CVD etch to deposition ratio. The lowered etch to deposition ratio is achieved by lowering a ratio of oxygen to silane gas, by lowering the power of a high frequency bias signal, and by lowering the total gas flow rate.
    Type: Application
    Filed: October 22, 2001
    Publication date: April 24, 2003
    Inventors: Tai-Peng Lee, Chuck Jang