Patents by Inventor Tai-Shin Cheng
Tai-Shin Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9997520Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes a conductive structure in or over the substrate. The semiconductor device structure includes a first dielectric layer over the substrate. The first dielectric layer has a first opening exposing the conductive structure. The semiconductor device structure includes a second dielectric layer over the first dielectric layer. The second dielectric layer has a second opening connected to the first opening and exposing the conductive structure. The semiconductor device structure includes a capacitor covering a first inner wall of the first opening, a second inner wall of the second opening, and a top surface of the conductive structure. The capacitor is electrically connected to the conductive structure.Type: GrantFiled: July 31, 2015Date of Patent: June 12, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Tai-Shin Cheng, Che-Cheng Chang
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Patent number: 9997401Abstract: A method for forming the semiconductor device structure is provided. The method includes forming a first metal layer over a substrate and forming a dielectric layer over the first metal layer. The method includes forming an antireflection layer over the dielectric layer, forming a hard mask layer over the antireflection layer and forming a patterned photoresist layer over the hard mask layer. The method includes etching a portion of the antireflection layer by performing a first etching process and etching through the antireflection layer and etching a portion of the dielectric layer by performing a second etching process. The method includes etching through the dielectric layer by performing a third etching process to form a via portion on the first metal layer. The via portion includes a first sidewall and a second sidewall, and the slope of the first sidewall is different from that of the second sidewall.Type: GrantFiled: January 3, 2017Date of Patent: June 12, 2018Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wei-Yin Shiao, Che-Cheng Chang, Tai-Shin Cheng, Wei-Ting Chen
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Patent number: 9761488Abstract: A method for forming the semiconductor device structure is provided. The method includes forming a metal layer in a first dielectric layer over a substrate and forming an etch stop layer over the metal layer. The etch stop layer is made of metal-containing material. The method also includes forming a second dielectric layer over the etch stop layer and removing a portion of the second dielectric layer to expose the etch stop layer and to form a via by an etching process. The method further includes performing a plasma cleaning process on the via and the second dielectric layer, and the plasma cleaning process is performed by using a plasma including nitrogen gas (N2) and hydrogen gas (H2).Type: GrantFiled: July 17, 2015Date of Patent: September 12, 2017Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tai-Shin Cheng, Che-Cheng Chang, Wei-Ting Chen, Wei-Yin Shiao
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Publication number: 20170194197Abstract: A method for forming the semiconductor device structure is provided. The method includes forming a first metal layer over a substrate and forming a dielectric layer over the first metal layer. The method includes forming an antireflection layer over the dielectric layer, forming a hard mask layer over the antireflection layer and forming a patterned photoresist layer over the hard mask layer. The method includes etching a portion of the antireflection layer by performing a first etching process and etching through the antireflection layer and etching a portion of the dielectric layer by performing a second etching process. The method includes etching through the dielectric layer by performing a third etching process to form a via portion on the first metal layer. The via portion includes a first sidewall and a second sidewall, and the slope of the first sidewall is different from that of the second sidewall.Type: ApplicationFiled: January 3, 2017Publication date: July 6, 2017Inventors: Wei-Yin Shiao, Che-Cheng Chang, Tai-Shin Cheng, Wei-Ting Chen
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Publication number: 20170033112Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes a conductive structure in or over the substrate. The semiconductor device structure includes a first dielectric layer over the substrate. The first dielectric layer has a first opening exposing the conductive structure. The semiconductor device structure includes a second dielectric layer over the first dielectric layer. The second dielectric layer has a second opening connected to the first opening and exposing the conductive structure. The semiconductor device structure includes a capacitor covering a first inner wall of the first opening, a second inner wall of the second opening, and a top surface of the conductive structure. The capacitor is electrically connected to the conductive structure.Type: ApplicationFiled: July 31, 2015Publication date: February 2, 2017Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Tai-Shin CHENG, Che-Cheng CHANG
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Publication number: 20170018458Abstract: A method for forming the semiconductor device structure is provided. The method includes forming a metal layer in a first dielectric layer over a substrate and forming an etch stop layer over the metal layer. The etch stop layer is made of metal-containing material. The method also includes forming a second dielectric layer over the etch stop layer and removing a portion of the second dielectric layer to expose the etch stop layer and to form a via by an etching process. The method further includes performing a plasma cleaning process on the via and the second dielectric layer, and the plasma cleaning process is performed by using a plasma including nitrogen gas (N2) and hydrogen gas (H2).Type: ApplicationFiled: July 17, 2015Publication date: January 19, 2017Applicant: Taiwan Semiconductor Manufacturing Co., LtdInventors: Tai-Shin CHENG, Che-Cheng CHANG, Wei-Ting CHEN, Wei-Yin SHIAO
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Patent number: 9536964Abstract: A method for forming the semiconductor device structure is provided. The method includes forming a first metal layer over a substrate and forming a dielectric layer over the first metal layer. The method includes forming an antireflection layer over the dielectric layer, forming a hard mask layer over the antireflection layer and forming a patterned photoresist layer over the hard mask layer. The method includes etching a portion of the antireflection layer by performing a first etching process and etching through the antireflection layer and etching a portion of the dielectric layer by performing a second etching process. The method includes etching through the dielectric layer by performing a third etching process to form a via portion on the first metal layer. The via portion includes a first sidewall and a second sidewall, and the slope of the first sidewall is different from that of the second sidewall.Type: GrantFiled: May 29, 2015Date of Patent: January 3, 2017Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wei-Yin Shiao, Che-Cheng Chang, Tai-Shin Cheng, Wei-Ting Chen
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Publication number: 20160351669Abstract: A method for forming the semiconductor device structure is provided. The method includes forming a first metal layer over a substrate and forming a dielectric layer over the first metal layer. The method includes forming an antireflection layer over the dielectric layer, forming a hard mask layer over the antireflection layer and forming a patterned photoresist layer over the hard mask layer. The method includes etching a portion of the antireflection layer by performing a first etching process and etching through the antireflection layer and etching a portion of the dielectric layer by performing a second etching process. The method includes etching through the dielectric layer by performing a third etching process to form a via portion on the first metal layer. The via portion includes a first sidewall and a second sidewall, and the slope of the first sidewall is different from that of the second sidewall.Type: ApplicationFiled: May 29, 2015Publication date: December 1, 2016Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Wei-Yin SHIAO, Che-Cheng CHANG, Tai-Shin CHENG, Wei-Ting CHEN
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Patent number: 9425087Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a dielectric layer over a semiconductor substrate. The method includes forming a mask layer over the dielectric layer. The mask layer has an opening exposing a portion of the dielectric layer. The method includes removing the portion of the dielectric layer through the opening to form a recess in the dielectric layer. The method includes removing the mask layer. The method includes performing a plasma cleaning process over the dielectric layer. The plasma cleaning process uses a carbon dioxide-containing gas.Type: GrantFiled: May 29, 2015Date of Patent: August 23, 2016Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTDInventors: Wei-Ting Chen, Che-Cheng Chang, Tai-Shin Cheng, Wei-Yin Shiao