Patents by Inventor Tai-Yi CHEN

Tai-Yi CHEN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210090989
    Abstract: An integrated circuit structure includes a first conductive plate, a second conductive plate, a plurality of conductive lines, and a plurality of conductive vias. The first conductive plate is disposed in a first layer on a semiconductor substrate. The second conductive plate is disposed in a second layer on the semiconductor substrate. The plurality of conductive lines are disposed in the first layer for surrounding the first conductive plate. The plurality of conductive vias are arranged to couple the plurality of conductive lines to the second conductive plate. The second layer is different from the first layer, and the first conductive plate is physically separated from the second conductive plate, the plurality of conductive lines, and the plurality of conductive vias.
    Type: Application
    Filed: December 8, 2020
    Publication date: March 25, 2021
    Inventors: TAI-YI CHEN, YUNG-CHOW PENG, CHUNG-CHIEH YANG
  • Patent number: 10878160
    Abstract: An electronic design flow generates an electronic architectural design layout for analog circuitry from a schematic diagram. The electronic design flow assigns analog circuits of the schematic diagram to various categories of analog circuits. The electronic design flow places various analog standard cells corresponding to these categories of analog circuits into analog placement sites assigned to the analog circuits. These analog standard cells have a uniform cell height which allows these analog standard cells to be readily connected or merged to digital standard cells which decreases the area of the electronic architectural design layout. This uniformity in height between these analog standard cells additionally provides a more reliable yield when compared to non-uniform analog standard cells.
    Type: Grant
    Filed: July 31, 2019
    Date of Patent: December 29, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chung-Ting Lu, Chih-Chiang Chang, Chung-Peng Hsieh, Chung-Chieh Yang, Yung-Chow Peng, Yung-Shun Chen, Tai-Yi Chen, Nai Chen Cheng
  • Publication number: 20200395291
    Abstract: An integrated circuit structure includes: a first conductive plate disposed in a first layer on a semiconductor substrate; a second conductive plate disposed in a second layer on the semiconductor substrate; a plurality of conductive lines disposed in the first layer, for surrounding the first conductive plate; and a plurality of conductive vias arranged to couple the plurality of conductive lines to the second conductive plate; wherein the second layer is different from the first layer, and the first conductive plate is physically separated from the second conductive plate, the plurality of conductive lines, and the plurality of conductive vias.
    Type: Application
    Filed: June 14, 2019
    Publication date: December 17, 2020
    Inventors: TAI-YI CHEN, YUNG-CHOW PENG, CHUNG-CHIEH YANG
  • Patent number: 10867904
    Abstract: An integrated circuit structure includes: a first conductive plate disposed in a first layer on a semiconductor substrate; a second conductive plate disposed in a second layer on the semiconductor substrate; a plurality of conductive lines disposed in the first layer, for surrounding the first conductive plate; and a plurality of conductive vias arranged to couple the plurality of conductive lines to the second conductive plate; wherein the second layer is different from the first layer, and the first conductive plate is physically separated from the second conductive plate, the plurality of conductive lines, and the plurality of conductive vias.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: December 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Tai-Yi Chen, Yung-Chow Peng, Chung-Chieh Yang
  • Publication number: 20200227516
    Abstract: Capacitor structures with low capacitances are disclosed. In one example, a capacitor structure is disclosed. The capacitor structure includes a first electrode and a second electrode. The first electrode comprises a first metal finger. The second electrode comprises a second metal finger and a third metal finger that are parallel to each other and to the first metal finger. The first metal finger is formed between the second metal finger and the third metal finger. The capacitor structure further includes: a fourth metal finger formed as a dummy metal finger between the first metal finger and the second metal finger, and a fifth metal finger formed as a dummy metal finger between the first metal finger and the third metal finger. The fourth metal finger and the fifth metal finger are parallel to the first metal finger.
    Type: Application
    Filed: March 30, 2020
    Publication date: July 16, 2020
    Inventors: Tai-Yi Chen, Chung-Chieh Yang, Yung-Chow Peng
  • Publication number: 20200129750
    Abstract: A needle-free connector including a guiding base, a connecting base, a valve member, and a seal member is provided. The guiding base has a conduit, and the conduit extends downward along an axial direction. The connecting base is disposed on the guiding base and has a screw portion and a passage running through the screw portion. A chamber is formed between the guiding base and the connecting base, and the conduit and the passage respectively communicate with the chamber along the axial direction. The valve member is disposed between the guiding base and the connecting base, and is movably located in the chamber. The seal member is disposed at an end of the valve member far away from the conduit, and the seal member and the valve member are adapted to be connected into a whole in a manufacturing process.
    Type: Application
    Filed: April 29, 2019
    Publication date: April 30, 2020
    Inventor: Tai-Yi Chen
  • Patent number: 10629672
    Abstract: Capacitor structures with low capacitances are disclosed. In one example, a capacitor structure is disclosed. The capacitor structure includes a first electrode and a second electrode. The first electrode comprises a first metal finger. The second electrode comprises a second metal finger and a third metal finger that are parallel to each other and to the first metal finger. The first metal finger is formed between the second metal finger and the third metal finger. The capacitor structure further includes: a fourth metal finger formed as a dummy metal finger between the first metal finger and the second metal finger, and a fifth metal finger formed as a dummy metal finger between the first metal finger and the third metal finger. The fourth metal finger and the fifth metal finger are parallel to the first metal finger.
    Type: Grant
    Filed: December 11, 2018
    Date of Patent: April 21, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tai-Yi Chen, Chung-Chieh Yang, Yung-Chow Peng
  • Publication number: 20200044012
    Abstract: Capacitor structures with low capacitances are disclosed. In one example, a capacitor structure is disclosed. The capacitor structure includes a first electrode and a second electrode. The first electrode comprises a first metal finger. The second electrode comprises a second metal finger and a third metal finger that are parallel to each other and to the first metal finger. The first metal finger is formed between the second metal finger and the third metal finger. The capacitor structure further includes: a fourth metal finger formed as a dummy metal finger between the first metal finger and the second metal finger, and a fifth metal finger formed as a dummy metal finger between the first metal finger and the third metal finger. The fourth metal finger and the fifth metal finger are parallel to the first metal finger.
    Type: Application
    Filed: December 11, 2018
    Publication date: February 6, 2020
    Inventors: Tai-Yi CHEN, Chung-Chieh YANG, Yung-Chow PENG