Abstract: A package structure including a semiconductor die, a redistribution circuit structure and an electronic device is provided. The semiconductor die is laterally encapsulated by an insulating encapsulation. The redistribution circuit structure is disposed on the semiconductor die and the insulating encapsulation. The redistribution circuit structure includes a colored dielectric layer, inter-dielectric layers and redistribution conductive layers embedded in the inter-dielectric layers. The electronic device is disposed over the colored dielectric layer and electrically connected to the redistribution circuit structure.

Abstract: A tunneling transistor and a method of fabricating the same, the tunneling transistor includes a fin shaped structure, a source structure and a drain structure, and a gate structure. The fin shaped structure is disposed in a substrate, and the source structure and the drain structure are disposed the fin shaped structure, wherein an entirety of the source structure and an entirety of the drain structure being of complementary conductivity types with respect to one another and having different materials. A channel region is disposed in the fin shaped structure between the source structure and the drain structure and the gate structure is disposed on the channel region. That is, a hetero tunneling junction is vertically formed between the channel region and the source structure, and between the channel region and the drain structure in the fin shaped structure.

Abstract: A tunneling transistor and a method of fabricating the same, the tunneling transistor includes a fin shaped structure, a source structure and a drain structure, and a gate structure. The fin shaped structure is disposed in a substrate, and the source structure and the drain structure are disposed the fin shaped structure, wherein an entirety of the source structure and an entirety of the drain structure being of complementary conductivity types with respect to one another and having different materials. A channel region is disposed in the fin shaped structure between the source structure and the drain structure and the gate structure is disposed on the channel region. That is, a hetero tunneling junction is vertically formed between the channel region and the source structure, and between the channel region and the drain structure in the fin shaped structure.

Abstract: A tunneling transistor and a method of fabricating the same, the tunneling transistor includes a fin shaped structure, a source structure and a drain structure, and a gate structure. The fin shaped structure is disposed in a substrate, and the source structure and the drain structure are disposed the fin shaped structure, wherein an entirety of the source structure and an entirety of the drain structure being of complementary conductivity types with respect to one another and having different materials. A channel region is disposed in the fin shaped structure between the source structure and the drain structure and the gate structure is disposed on the channel region. That is, a hetero tunneling junction is vertically formed between the channel region and the source structure, and between the channel region and the drain structure in the fin shaped structure.

Abstract: First, a substrate having a first region and a second region is provided, a first gate structure is formed on the first region and a second gate structure is formed on the second region, an interlayer dielectric (ILD) layer is formed around the first gate structure and the second gate structure, and the first gate structure and the second gate structure are removed to expose the substrate on the first region and the second region. Next, part of the substrate on the first region is removed to form a first recess and part of the substrate on the second region is removed to form a second recess, in which the depths of the first recess and the second recess are different. Next, a first metal gate is formed on the first region and a second metal gate is formed on the second region.

Abstract: First, a substrate having a first region and a second region is provided, a first gate structure is formed on the first region and a second gate structure is formed on the second region, an interlayer dielectric (ILD) layer is formed around the first gate structure and the second gate structure, and the first gate structure and the second gate structure are removed to expose the substrate on the first region and the second region. Next, part of the substrate on the first region is removed to form a first recess and part of the substrate on the second region is removed to form a second recess, in which the depths of the first recess and the second recess are different. Next, a first metal gate is formed on the first region and a second metal gate is formed on the second region.

Abstract: A tunneling transistor and a method of fabricating the same, the tunneling transistor includes a fin shaped structure, a source structure and a drain structure, and a gate structure. The fin shaped structure is disposed in a substrate, and the source structure and the drain structure are disposed the fin shaped structure, wherein an entirety of the source structure and an entirety of the drain structure being of complementary conductivity types with respect to one another and having different materials. A channel region is disposed in the fin shaped structure between the source structure and the drain structure and the gate structure is disposed on the channel region. That is, a hetero tunneling junction is vertically formed between the channel region and the source structure, and between the channel region and the drain structure in the fin shaped structure.

Abstract: Disclosed herein are processes for manufacturing modified polyesters. An esterification reaction of diacid, diol and a branching agent having at least three carboxyl groups is carried out at a temperature of about 180 to 300° C. and a pressure of about 1 to 4 bar to obtain a product of esterification. A polycondensation reaction of the product of esterification and a diamine is carried out at a pressure below about 0.01 bars to obtain the modified polyester.

Abstract: A process for manufacturing a modified polyester, comprising the steps of: obtain a esterification product of diacid, diol, and a branching agent having at least three carboxyl groups , wherein the branching agent is present in an amount of up to 1 mol %, and carrying out a polycondensation reaction of the esterification product and a diamine to obtain the modified polyester, wherein the diamine is present in an amount of about 0.07 to about 0.22 mol %, the diacid comprises a combination of at least one aliphatic diacid and at least one aromatic diacid which is present in an amount no greater than about 10 mol % based upon the total moles of the diacid and the diol. The modified polyester is a thermally induced shape-memory material having an activation temperature of about 40 to 99° C., a percent elongation at break of about 29.9 % to 40.9% and bending modulus of about 40.3 MPa to about 20.1 Mpa.

Abstract: The present invention is a multi-gas sensor and a method for fabricating the multi-gas sensor. The multi-gas sensor comprises a substrate, an epitaxial layer, a metal oxide layer, a first metal layer, a second metal layer and multiple third metal layers. The method for fabricating the multi-gas sensor comprises steps of forming an epitaxial layer on a substrate; etching the epitaxial layer to form a first epitaxial structure and a second epitaxial structure a fixed distance from the first epitaxial structure; forming a metal oxide layer on the first epitaxial structure; forming a first metal layer that has at least two metal layers on the second epitaxial structure; forming a second metal layer a fixed distance from the first metal layer on the second epitaxial structure; forming third metal layers respectively on the metal oxide layer, the first metal layer and the second metal layer.

Abstract: Disclosed herein are processes for manufacturing modified polyesters. An esterification reaction of diacid, diol and a branching agent having at least three carboxyl groups is carried out at a temperature of about 180 to 300° C. and a pressure of about 1 to 4 bar to obtain a product of esterification. A polycondensation reaction of the product of esterification and a diamine is carried out at a pressure below about 0.01 bars to obtain the modified polyester.

Abstract: The present invention is a multi-gas sensor and a method for fabricating the multi-gas sensor. The multi-gas sensor comprises a substrate, an epitaxial layer, a metal oxide layer, a first metal layer, a second metal layer and multiple third metal layers. The method for fabricating the multi-gas sensor comprises steps of forming an epitaxial layer on a substrate; etching the epitaxial layer to form a first epitaxial structure and a second epitaxial structure a fixed distance from the first epitaxial structure; forming a metal oxide layer on the first epitaxial structure; forming a first metal layer that has at least two metal layers on the second epitaxial structure; forming a second metal layer a fixed distance from the first metal layer on the second epitaxial structure; forming third metal layers respectively on the metal oxide layer, the first metal layer and the second metal layer.

Abstract: A gas sensor includes a substrate; a seed layer positioned on the substrate; a zinc-oxide nanostructure formed on the seed layer; a metal nanoparticle formed on the zinc-oxide nanostructure; a first electrode positioned on the zinc-oxide nanostructure; and a second electrode positioned on the zinc-oxide nanostructure apart from the first electrode to electrically connect to the first electrode.