Patents by Inventor Tai-You Lu

Tai-You Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240096781
    Abstract: A package structure including a semiconductor die, a redistribution circuit structure and an electronic device is provided. The semiconductor die is laterally encapsulated by an insulating encapsulation. The redistribution circuit structure is disposed on the semiconductor die and the insulating encapsulation. The redistribution circuit structure includes a colored dielectric layer, inter-dielectric layers and redistribution conductive layers embedded in the inter-dielectric layers. The electronic device is disposed over the colored dielectric layer and electrically connected to the redistribution circuit structure.
    Type: Application
    Filed: March 20, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Ti Lu, Hao-Yi Tsai, Chia-Hung Liu, Yu-Hsiang Hu, Hsiu-Jen Lin, Tzuan-Horng Liu, Chih-Hao Chang, Bo-Jiun Lin, Shih-Wei Chen, Hung-Chun Cho, Pei-Rong Ni, Hsin-Wei Huang, Zheng-Gang Tsai, Tai-You Liu, Po-Chang Shih, Yu-Ting Huang
  • Patent number: 10756933
    Abstract: A filtering device includes a low-pass filter (LPF), a noise estimation circuit and a first combining circuit. The LPF receives and filters a pre-filtering signal to generate an output signal of the filtering device. The noise estimation circuit estimates an estimated noise signal according to the output signal and the pre-filtering signal. The first combining circuit subtracts the estimated noise signal from an input signal of the filtering device to generate the pre-filtering signal.
    Type: Grant
    Filed: December 25, 2017
    Date of Patent: August 25, 2020
    Assignee: MediaTek Inc.
    Inventor: Tai-You Lu
  • Patent number: 10212006
    Abstract: A filtering device includes a low-pass filter (LPF), a noise estimation circuit and a first combining circuit. The LPF receives and filters a pre-filtering signal to generate an output signal of the filtering device. The noise estimation circuit estimates an estimated noise signal according to the output signal and the pre-filtering signal. The first combining circuit subtracts the estimated noise signal from an input signal of the filtering device to generate the pre-filtering signal.
    Type: Grant
    Filed: February 6, 2017
    Date of Patent: February 19, 2019
    Assignee: MEDIATEK INC.
    Inventor: Tai-You Lu
  • Publication number: 20180123838
    Abstract: A filtering device includes a low-pass filter (LPF), a noise estimation circuit and a first combining circuit. The LPF receives and filters a pre-filtering signal to generate an output signal of the filtering device. The noise estimation circuit estimates an estimated noise signal according to the output signal and the pre-filtering signal. The first combining circuit subtracts the estimated noise signal from an input signal of the filtering device to generate the pre-filtering signal.
    Type: Application
    Filed: December 25, 2017
    Publication date: May 3, 2018
    Inventor: Tai-You Lu
  • Publication number: 20170257235
    Abstract: A filtering device includes a low-pass filter (LPF), a noise estimation circuit and a first combining circuit. The LPF receives and filters a pre-filtering signal to generate an output signal of the filtering device. The noise estimation circuit estimates an estimated noise signal according to the output signal and the pre-filtering signal. The first combining circuit subtracts the estimated noise signal from an input signal of the filtering device to generate the pre-filtering signal.
    Type: Application
    Filed: February 6, 2017
    Publication date: September 7, 2017
    Inventor: Tai-You Lu
  • Patent number: 9349682
    Abstract: A semiconductor chip is provided. The semiconductor chip includes a first circuit, a second circuit, a third circuit, a first signal path and a second signal path. The first circuit provides a reference signal. The first signal path includes a first conductive trace and transmits the reference signal from the first circuit to the second circuit. The second signal path transmits the reference signal from the first circuit to the third circuit. Timing skews of the first and second signal paths are balanced and the first and second signal paths are routed globally.
    Type: Grant
    Filed: February 27, 2014
    Date of Patent: May 24, 2016
    Assignee: MEDIATEK INC.
    Inventors: Der-Ping Liu, Tai-You Lu
  • Publication number: 20150243595
    Abstract: A semiconductor chip is provided. The semiconductor chip includes a first circuit, a second circuit, a third circuit, a first signal path and a second signal path. The first circuit provides a reference signal. The first signal path includes a first conductive trace and transmits the reference signal from the first circuit to the second circuit. The second signal path transmits the reference signal from the first circuit to the third circuit. Timing skews of the first and second signal paths are balanced and the first and second signal paths are routed globally.
    Type: Application
    Filed: February 27, 2014
    Publication date: August 27, 2015
    Applicant: MediaTek Inc.
    Inventors: Der-Ping LIU, Tai-You LU
  • Patent number: 7792497
    Abstract: A method and an apparatus for frequency synthesizing are provided for a wireless communication system. In a frequency synthesizer, a phase lock loop (PLL) circuit generates a first elemental frequency based on a reference frequency and a unity frequency. A first division module then divides the first elemental frequency to generate a second elemental frequency. A second division module divides the second elemental frequency a multiple of times to generate the unity frequency and a plurality of intermediate frequencies each having an exponential ratio to the unity frequency by a power of two. A second mixer is provided to mix one of the intermediate frequencies with the unity frequency to generate a step frequency, and a first mixer mixes the step frequency with one of the first and second elemental frequencies to generate an output frequency having a variety covering all frequency bands in an Ultra-Wide-Band (UWB) spectrum.
    Type: Grant
    Filed: September 27, 2007
    Date of Patent: September 7, 2010
    Assignee: Mediatek Inc.
    Inventors: Wei-Zen Chen, Tai-You Lu
  • Publication number: 20080233914
    Abstract: A method and an apparatus for frequency synthesizing are provided for a wireless communication system. In a frequency synthesizer, a phase lock loop (PLL) circuit generates a first elemental frequency based on a reference frequency and a unity frequency. A first division module then divides the first elemental frequency to generate a second elemental frequency. A second division module divides the second elemental frequency a multiple of times to generate the unity frequency and a plurality of intermediate frequencies each having an exponential ratio to the unity frequency by a power of two. A second mixer is provided to mix one of the intermediate frequencies with the unity frequency to generate a step frequency, and a first mixer mixes the step frequency with one of the first and second elemental frequencies to generate an output frequency having a variety covering all frequency bands in an Ultra-Wide-Band (UWB) spectrum.
    Type: Application
    Filed: September 27, 2007
    Publication date: September 25, 2008
    Applicant: MEDIATEK INC.
    Inventors: Wei-Zen Chen, Tai-You Lu