Abstract: A semiconductor wafers processing apparatus comprises a susceptor for mounting and fixing a wafer thereon, a cooling jacket for cooling the susceptor, a process chamber whose wall encloses the susceptor and the cooling jacket, an O-ring for shielding from process atmosphere in the process chamber a clearance formed between an inner cylinder of the process chamber wall and the outer circumferences of the susceptor and the cooling jacket, and an exhaust pump for exhausting gas in the clearance. It further comprises load lock chambers for carrying the wafer into and out of the process chamber, and heat insulating members interposed between those faces of the process chamber and each of the load lock chambers which are opposed to each other. The process chamber wall can be heat-insulated from the susceptor and the cooling jacket by the exhausted clearance and the process chamber can be heat-insulated from each of the load lock chambers by the heat insulating members.

Abstract: The pressure-reduced chamber system of the invention includes a handling mechanism for loading and/or unloading a semiconductor wafer between a process chamber in which a plasma etching is carried out on a semiconductor wafer under a reduced pressure, and a pressure-reduced chamber. Further, the system includes an outer cover for covering the driving force transmitting section of the handling mechanism, a filter mounted to the outer cover such that it defines the inside and outside of the outer cover, and an exhaustion pump for evacuating the space region formed between the outer cover and the pressure-reduced chamber. Thus, when the space region is evacuated by the exhaustion pump, the dust generated from the driving force transmitting section of the handling mechanism is caught by the filter.