Patents by Inventor Taichi Iwasaki

Taichi Iwasaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180158816
    Abstract: A first transistor required for decreasing leak current and a second transistor required for compatibility of high speed operation and low power consumption can be formed over an identical substrate and sufficient performance can be provided to the two types of the transistors respectively. Decrease in the leak current is required for the first transistor. Less power consumption and high speed operation are required for the second transistor. The upper surface of a portion of a substrate in which the second diffusion layer is formed is lower than the upper surface of a portion of the substrate where the first diffusion layer is formed.
    Type: Application
    Filed: January 30, 2018
    Publication date: June 7, 2018
    Inventors: Satoshi KURA, Mitsuo NISSA, Keiji SAKAMOTO, Taichi IWASAKI
  • Patent number: 9917083
    Abstract: A first transistor required for decreasing leak current and a second transistor required for compatibility of high speed operation and low power consumption can be formed over an identical substrate and sufficient performance can be provided to the two types of the transistors respectively. Decrease in the leak current is required for the first transistor. Less power consumption and high speed operation are required for the second transistor. The upper surface of a portion of a substrate in which the second diffusion layer is formed is lower than the upper surface of a portion of the substrate where the first diffusion layer is formed.
    Type: Grant
    Filed: April 8, 2013
    Date of Patent: March 13, 2018
    Assignee: Renesas Electronics Corporation
    Inventors: Satoshi Kura, Mitsuo Nissa, Keiji Sakamoto, Taichi Iwasaki
  • Publication number: 20130277749
    Abstract: A first transistor required for decreasing leak current and a second transistor required for compatibility of high speed operation and low power consumption can be formed over an identical substrate and sufficient performance can be provided to the two types of the transistors respectively. Decrease in the leak current is required for the first transistor. Less power consumption and high speed operation are required for the second transistor. The upper surface of a portion of a substrate in which the second diffusion layer is formed is lower than the upper surface of a portion of the substrate where the first diffusion layer is formed.
    Type: Application
    Filed: April 8, 2013
    Publication date: October 24, 2013
    Applicant: Renesas Electronics Corporation
    Inventors: Satoshi Kura, Mitsuo Nissa, Keiji Sakamoto, Taichi Iwasaki