Patents by Inventor Taiga Fukumori
Taiga Fukumori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230243878Abstract: A process includes reading a measurement result of a sum of a conductor loss and a dielectric loss for a signal at a predetermined frequency in each of first wiring-boards, respective wiring-widths and insulating-layer-thicknesses of the first wiring-boards being different, and an analysis result by three-dimensional electromagnetic field analysis of conductivity dependence of the conductor loss and the dielectric loss in each of second wiring-boards including same wiring-widths and insulating-layer-thicknesses as the wiring-widths and the insulating-layer-thicknesses of the first wiring-boards, obtaining a first ratio of conductor losses and a second ratio of dielectric losses between two second wiring-boards among the second wiring-boards, based on the analysis result, and obtaining a value of the conductor loss and a value of the dielectric loss for each of two first wiring-boards corresponding to the two second wiring-boards among the first wiring-boards, based on the first ratio, the second ratio, and thType: ApplicationFiled: November 9, 2022Publication date: August 3, 2023Applicant: Fujitsu LimitedInventor: Taiga FUKUMORI
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Patent number: 10311189Abstract: Three-dimensional electromagnetic field analysis is performed for a plurality of positional patterns of a first wiring board internal structure model including one glass cloth on the upper side of differential lines and also for a plurality of positional patterns of a second wiring board internal structure model including one glass cloth on the lower side of differential lines to calculate skews, and the calculated skews are summed relating to a plurality of wiring board patterns configured by combining a plurality of combination patterns obtained by combining the plurality of positional patterns of the first model and a plurality of combination patterns obtained by combining the plurality of positional patterns of the second model to calculate a total skew and then a skew distribution in a wiring board having a certain line length is acquired based on the total skew.Type: GrantFiled: April 9, 2014Date of Patent: June 4, 2019Assignee: FUJITSU LIMITEDInventors: Hideaki Nagaoka, Taiga Fukumori, Daisuke Mizutani
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Patent number: 10306757Abstract: A circuit board includes an insulation layer, a signal line formed over the insulation layer and extending in a direction X, and a conductor layer formed under the insulation layer. The insulation layer has periodic dielectric-constant distribution in a direction Y orthogonal to the direction X. The conductor layer includes a slit at a position corresponding to the signal line. The slit expands an electric field produced between the signal line and the conductor layer; causes less difference in dielectric constants of the insulation layer in the vicinity of the signal line (the difference is caused by the positional relationship between the signal line and the dielectric-constant distribution of the insulation layer); and reduces difference in signal transmission speeds caused by the positional relationship.Type: GrantFiled: May 22, 2018Date of Patent: May 28, 2019Assignee: FUJITSU LIMITEDInventor: Taiga Fukumori
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Publication number: 20180270949Abstract: A circuit board includes an insulation layer, a signal line formed over the insulation layer and extending in a direction X, and a conductor layer formed under the insulation layer. The insulation layer has periodic dielectric-constant distribution in a direction Y orthogonal to the direction X. The conductor layer includes a slit at a position corresponding to the signal line. The slit expands an electric field produced between the signal line and the conductor layer; causes less difference in dielectric constants of the insulation layer in the vicinity of the signal line (the difference is caused by the positional relationship between the signal line and the dielectric-constant distribution of the insulation layer); and reduces difference in signal transmission speeds caused by the positional relationship.Type: ApplicationFiled: May 22, 2018Publication date: September 20, 2018Applicant: FUJITSU LIMITEDInventor: Taiga Fukumori
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Patent number: 9754830Abstract: A wiring substrate includes: a substrate; an insulator formed in the substrate and having a through hole; an electrode formed in the substrate and provided within the through hole; and a conductor bonded to the electrode and provided within the through hole, wherein the through hole has a shape that is widened toward a direction away from the substrate, and the conductor is configured to cover the entire top surface of the electrode and has a shape that is widened toward the direction away from the substrate.Type: GrantFiled: April 19, 2016Date of Patent: September 5, 2017Assignee: FUJITSU LIMITEDInventors: Taiga Fukumori, Daisuke Mizutani, Mamoru Kurashina
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Patent number: 9699888Abstract: A circuit substrate includes: a plurality of signal wirings formed at different positions of the circuit substrate in a thickness direction and extending in parallel in the circuit substrate; and ground layers or power supply layers formed at both sides of the circuit substrate in the thickness direction by interposing the plurality of the signal wirings between the ground layers or between the power supply layers, wherein the plurality of signal wirings are electrically coupled with each other by a plurality of conductors formed at an interval narrower than an interval by which a resonance is caused.Type: GrantFiled: August 28, 2015Date of Patent: July 4, 2017Assignee: FUJITSU LIMITEDInventor: Taiga Fukumori
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Publication number: 20160233128Abstract: A wiring substrate includes: a substrate; an insulator formed in the substrate and having a through hole; an electrode formed in the substrate and provided within the through hole; and a conductor bonded to the electrode and provided within the through hole, wherein the through hole has a shape that is widened toward a direction away from the substrate, and the conductor is configured to cover the entire top surface of the electrode and has a shape that is widened toward the direction away from the substrate.Type: ApplicationFiled: April 19, 2016Publication date: August 11, 2016Applicant: FUJITSU LIMITEDInventors: Taiga Fukumori, Daisuke Mizutani, Mamoru Kurashina
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Publication number: 20160105955Abstract: A circuit substrate includes: a plurality of signal wirings formed at different positions of the circuit substrate in a thickness direction and extending in parallel in the circuit substrate; and ground layers or power supply layers formed at both sides of the circuit substrate in the thickness direction by interposing the plurality of the signal wirings between the ground layers or between the power supply layers, wherein the plurality of signal wirings are electrically coupled with each other by a plurality of conductors formed at an interval narrower than an interval by which a resonance is caused.Type: ApplicationFiled: August 28, 2015Publication date: April 14, 2016Applicant: FUJITSU LIMITEDInventor: Taiga Fukumori
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Patent number: 9055685Abstract: An electric circuit apparatus includes: a first-circuit board that includes a first-through-hole, and a first-electrode disposed on a front side of the first-circuit-board; a second-circuit-board that is disposed on a back side of the first-circuit-board, the second-circuit-board including on the front side of the second-circuit-board a second-electrode associated with the first-through-hole; a semiconductor device that is disposed on the front side of the first-circuit-board, the semiconductor device including on a back side a third-electrode-associated with the first-electrode, and a fourth-electrode-associated with the second-electrode; a first-bonding-material that bonds the first-electrode and the-third-electrode; a second-bonding-material that bonds the second-electrode and the fourth-electrode while passing through the first-through-hole; and a support body that is disposed between the first-electrode and the second-circuit-board and that supports the first-circuit-board.Type: GrantFiled: May 24, 2013Date of Patent: June 9, 2015Assignee: FUJITSU LIMITEDInventors: Mamoru Kurashina, Daisuke Mizutani, Taiga Fukumori
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Publication number: 20140350901Abstract: Three-dimensional electromagnetic field analysis is performed for a plurality of positional patterns of a first wiring board internal structure model including one glass cloth on the upper side of differential lines and also for a plurality of positional patterns of a second wiring board internal structure model including one glass cloth on the lower side of differential lines to calculate skews, and the calculated skews are summed relating to a plurality of wiring board patterns configured by combining a plurality of combination patterns obtained by combining the plurality of positional patterns of the first model and a plurality of combination patterns obtained by combining the plurality of positional patterns of the second model to calculate a total skew and then a skew distribution in a wiring board having a certain line length is acquired based on the total skew.Type: ApplicationFiled: April 9, 2014Publication date: November 27, 2014Applicant: FUJITSU LIMITEDInventors: Hideaki Nagaoka, Taiga Fukumori, Daisuke Mizutani
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Publication number: 20140022751Abstract: An electric circuit apparatus includes: a first-circuit board that includes a first-through-hole, and a first-electrode disposed on a front side of the first-circuit-board; a second-circuit-board that is disposed on a back side of the first-circuit-board, the second-circuit-board including on the front side of the second-circuit-board a second-electrode associated with the first-through-hole; a semiconductor device that is disposed on the front side of the first-circuit-board, the semiconductor device including on a back side a third-electrode-associated with the first-electrode, and a fourth-electrode-associated with the second-electrode; a first-bonding-material that bonds the first-electrode and the-third-electrode; a second-bonding-material that bonds the second-electrode and the fourth-electrode while passing through the first-through-hole; and a support body that is disposed between the first-electrode and the second-circuit-board and that supports the first-circuit-board.Type: ApplicationFiled: May 24, 2013Publication date: January 23, 2014Applicant: FUJITSU LIMITEDInventors: Mamoru Kurashina, Daisuke Mizutani, Taiga Fukumori
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Publication number: 20140021609Abstract: A wiring substrate includes: a substrate; an insulator formed in the substrate and having a through hole; an electrode formed in the substrate and provided within the through hole; and a conductor bonded to the electrode and provided within the through hole, wherein the through hole has a shape that is widened toward a direction away from the substrate, and the conductor is configured to cover the entire top surface of the electrode and has a shape that is widened toward the direction away from the substrate.Type: ApplicationFiled: June 18, 2013Publication date: January 23, 2014Inventors: Taiga Fukumori, Daisuke Mizutani, Mamoru Kurashina