Patents by Inventor Taiga Muraoka
Taiga Muraoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10347769Abstract: A semiconductor device for miniaturization is provided. The semiconductor device includes a semiconductor layer; a first electrode and a second electrode that are on the semiconductor layer and apart from each other over the semiconductor layer; a gate electrode over the semiconductor layer; and a gate insulating layer between the semiconductor layer and the gate electrode. The first and second electrodes comprise first conductive layers and second conductive layers. In a region overlapping with the semiconductor layer, the second conductive layers are positioned between the first conductive layers, and side surfaces of the second conductive layers are in contact with side surfaces of the first conductive layers. The second conductive layers have smaller thicknesses than those of the first conductive layers, and the top surface levels of the second conductive layers are lower than those of the first conductive layers.Type: GrantFiled: March 11, 2014Date of Patent: July 9, 2019Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shinya Sasagawa, Motomu Kurata, Taiga Muraoka
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Patent number: 10211240Abstract: An object is to establish a processing technique in manufacture of a semiconductor device in which an oxide semiconductor is used. A gate electrode is formed over a substrate, a gate insulating layer is formed over the gate electrode, an oxide semiconductor layer is formed over the gate insulating layer, the oxide semiconductor layer is processed by wet etching to form an island-shaped oxide semiconductor layer, a conductive layer is formed to cover the island-shaped oxide semiconductor layer, the conductive layer is processed by dry etching to form a source electrode, and a drain electrode and part of the island-shaped oxide semiconductor layer is removed by dry etching to form a recessed portion in the island-shaped oxide semiconductor layer.Type: GrantFiled: December 11, 2017Date of Patent: February 19, 2019Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hideomi Suzawa, Shinya Sasagawa, Taiga Muraoka
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Patent number: 10043914Abstract: A substrate having an insulating surface is prepared; a stacked film including a first oxide semiconductor layer and a second oxide semiconductor layer is formed over the substrate; a mask layer is formed over part of the stacked film and then dry etching treatment is performed, so that the stacked film is removed, with a region provided with the mask layer remaining, and a reaction product is formed on a side surface of the remaining stacked film; the reaction product is removed by wet etching treatment after removal of the mask layer; a source electrode and a drain electrode are formed over the stacked film; and a third oxide semiconductor layer, a gate insulating film, and a gate electrode are stacked and formed in this order over the stacked film, and the source electrode and the drain electrode.Type: GrantFiled: June 7, 2016Date of Patent: August 7, 2018Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Motomu Kurata, Shinya Sasagawa, Taiga Muraoka, Hiroaki Honda, Takashi Hamada
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Publication number: 20180108680Abstract: An object is to establish a processing technique in manufacture of a semiconductor device in which an oxide semiconductor is used. A gate electrode is formed over a substrate, a gate insulating layer is formed over the gate electrode, an oxide semiconductor layer is formed over the gate insulating layer, the oxide semiconductor layer is processed by wet etching to form an island-shaped oxide semiconductor layer, a conductive layer is formed to cover the island-shaped oxide semiconductor layer, the conductive layer is processed by dry etching to form a source electrode, and a drain electrode and part of the island-shaped oxide semiconductor layer is removed by dry etching to form a recessed portion in the island-shaped oxide semiconductor layer.Type: ApplicationFiled: December 11, 2017Publication date: April 19, 2018Inventors: Hideomi SUZAWA, Shinya SASAGAWA, Taiga MURAOKA
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Patent number: 9929407Abstract: A non-aqueous secondary battery which has high charge-discharge capacity, can be charged and discharged at high speed, and has little deterioration in battery characteristics due to charge and discharge is provided. A negative electrode includes a current collector and an active material layer. The current collector includes a plurality of protrusion portions extending in a substantially perpendicular direction and a base portion connected to the plurality of protrusion portions. The protrusion portions and the base portion are formed using the same material containing titanium. Top surfaces and side surfaces of the protrusion portions and a top surface of the base portion are covered with the active material layer. The active material layer includes a plurality of whiskers. The active material layer may be covered with graphene.Type: GrantFiled: December 20, 2012Date of Patent: March 27, 2018Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kazuki Tanemura, Toshihiko Takeuchi, Taiga Muraoka
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Patent number: 9853069Abstract: An object is to establish a processing technique in manufacture of a semiconductor device in which an oxide semiconductor is used. A gate electrode is formed over a substrate, a gate insulating layer is formed over the gate electrode, an oxide semiconductor layer is formed over the gate insulating layer, the oxide semiconductor layer is processed by wet etching to form an island-shaped oxide semiconductor layer, a conductive layer is formed to cover the island-shaped oxide semiconductor layer, the conductive layer is processed by dry etching to form a source electrode, and a drain electrode and part of the island-shaped oxide semiconductor layer is removed by dry etching to form a recessed portion in the island-shaped oxide semiconductor layer.Type: GrantFiled: June 22, 2017Date of Patent: December 26, 2017Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hideomi Suzawa, Shinya Sasagawa, Taiga Muraoka
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Publication number: 20170294453Abstract: An object is to establish a processing technique in manufacture of a semiconductor device in which an oxide semiconductor is used. A gate electrode is formed over a substrate, a gate insulating layer is formed over the gate electrode, an oxide semiconductor layer is formed over the gate insulating layer, the oxide semiconductor layer is processed by wet etching to form an island-shaped oxide semiconductor layer, a conductive layer is formed to cover the island-shaped oxide semiconductor layer, the conductive layer is processed by dry etching to form a source electrode, and a drain electrode and part of the island-shaped oxide semiconductor layer is removed by dry etching to form a recessed portion in the island-shaped oxide semiconductor layer.Type: ApplicationFiled: June 22, 2017Publication date: October 12, 2017Inventors: Hideomi SUZAWA, Shinya SASAGAWA, Taiga MURAOKA
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Patent number: 9691789Abstract: An object is to establish a processing technique in manufacture of a semiconductor device in which an oxide semiconductor is used. A gate electrode is formed over a substrate, a gate insulating layer is formed over the gate electrode, an oxide semiconductor layer is formed over the gate insulating layer, the oxide semiconductor layer is processed by wet etching to form an island-shaped oxide semiconductor layer, a conductive layer is formed to cover the island-shaped oxide semiconductor layer, the conductive layer is processed by dry etching to form a source electrode, and a drain electrode and part of the island-shaped oxide semiconductor layer is removed by dry etching to form a recessed portion in the island-shaped oxide semiconductor layer.Type: GrantFiled: June 13, 2016Date of Patent: June 27, 2017Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hideomi Suzawa, Shinya Sasagawa, Taiga Muraoka
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Publication number: 20160293766Abstract: A substrate having an insulating surface is prepared; a stacked film including a first oxide semiconductor layer and a second oxide semiconductor layer is formed over the substrate; a mask layer is formed over part of the stacked film and then dry etching treatment is performed, so that the stacked film is removed, with a region provided with the mask layer remaining, and a reaction product is formed on a side surface of the remaining stacked film; the reaction product is removed by wet etching treatment after removal of the mask layer; a source electrode and a drain electrode are formed over the stacked film; and a third oxide semiconductor layer, a gate insulating film, and a gate electrode are stacked and formed in this order over the stacked film, and the source electrode and the drain electrode.Type: ApplicationFiled: June 7, 2016Publication date: October 6, 2016Inventors: Motomu KURATA, Shinya SASAGAWA, Taiga MURAOKA, Hiroaki HONDA, Takashi HAMADA
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Publication number: 20160284739Abstract: An object is to establish a processing technique in manufacture of a semiconductor device in which an oxide semiconductor is used. A gate electrode is formed over a substrate, a gate insulating layer is formed over the gate electrode, an oxide semiconductor layer is formed over the gate insulating layer, the oxide semiconductor layer is processed by wet etching to form an island-shaped oxide semiconductor layer, a conductive layer is formed to cover the island-shaped oxide semiconductor layer, the conductive layer is processed by dry etching to form a source electrode, and a drain electrode and part of the island-shaped oxide semiconductor layer is removed by dry etching to form a recessed portion in the island-shaped oxide semiconductor layer.Type: ApplicationFiled: June 13, 2016Publication date: September 29, 2016Inventors: Hideomi SUZAWA, Shinya SASAGAWA, Taiga MURAOKA
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Patent number: 9373525Abstract: An object is to establish a processing technique in manufacture of a semiconductor device in which an oxide semiconductor is used. A gate electrode is formed over a substrate, a gate insulating layer is formed over the gate electrode, an oxide semiconductor layer is formed over the gate insulating layer, the oxide semiconductor layer is processed by wet etching to form an island-shaped oxide semiconductor layer, a conductive layer is formed to cover the island-shaped oxide semiconductor layer, the conductive layer is processed by dry etching to form a source electrode, and a drain electrode and part of the island-shaped oxide semiconductor layer is removed by dry etching to form a recessed portion in the island-shaped oxide semiconductor layer.Type: GrantFiled: November 20, 2014Date of Patent: June 21, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hideomi Suzawa, Shinya Sasagawa, Taiga Muraoka
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Method for manufacturing a semiconductor device comprising a plurality of oxide semiconductor layers
Patent number: 9368636Abstract: A substrate having an insulating surface is prepared; a stacked film including a first oxide semiconductor layer and a second oxide semiconductor layer is formed over the substrate; a mask layer is formed over part of the stacked film and then dry etching treatment is performed, so that the stacked film is removed, with a region provided with the mask layer remaining, and a reaction product is formed on a side surface of the remaining stacked film; the reaction product is removed by wet etching treatment after removal of the mask layer; a source electrode and a drain electrode are formed over the stacked film; and a third oxide semiconductor layer, a gate insulating film, and a gate electrode are stacked and formed in this order over the stacked film, and the source electrode and the drain electrode.Type: GrantFiled: March 27, 2014Date of Patent: June 14, 2016Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Motomu Kurata, Shinya Sasagawa, Taiga Muraoka, Hiroaki Honda, Takashi Hamada -
Patent number: 9305774Abstract: A stable and minute processing method of a thin film is provided. Further, a miniaturized semiconductor device is provided. A method for processing a thin film includes the following steps: forming a film to be processed over a formation surface; forming an organic coating film over the film to be processed; forming a resist film over the organic coating film; exposing the resist film to light or an electron beam; removing part of the resist film by development to expose part of the organic coating film; depositing an organic material layer on the top surface and a side surface of the resist film by plasma treatment; etching part of the organic coating film using the resist film and the organic material layer as masks to expose part of the film to be processed; and etching part of the film to be processed using the resist film and the organic material layer as masks.Type: GrantFiled: March 19, 2014Date of Patent: April 5, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Taiga Muraoka, Motomu Kurata, Shinya Sasagawa, Katsuaki Tochibayashi
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Patent number: 9171959Abstract: Provided is a miniaturized transistor with stable and high electrical characteristics with high yield. In a semiconductor device including the transistor in which an oxide semiconductor film, a gate insulating film, and a gate electrode layer are stacked in this order, a first sidewall insulating layer is provided in contact with a side surface of the gate electrode layer, and a second sidewall insulating layer is provided to cover a side surface of the first sidewall insulating layer. The first sidewall insulating layer is an aluminum oxide film in which a crevice with an even shape is formed on its side surface. The second sidewall insulating layer is provided to cover the crevice. A source electrode layer and a drain electrode layer are provided in contact with the oxide semiconductor film and the second sidewall insulating layer.Type: GrantFiled: April 30, 2015Date of Patent: October 27, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Motomu Kurata, Shinya Sasagawa, Taiga Muraoka, Tetsuhiro Tanaka, Junichi Koezuka
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Patent number: 9123751Abstract: An object is to manufacture a semiconductor device including an oxide semiconductor at low cost with high productivity in such a manner that a photolithography process is simplified by reducing the number of light-exposure masks. In a method for manufacturing a semiconductor device including a channel-etched inverted-staggered thin film transistor, an oxide semiconductor film and a conductive film are etched using a mask layer formed with the use of a multi-tone mask which is a light-exposure mask through which light is transmitted so as to have a plurality of intensities. In etching steps, a first etching step is performed by dry etching in which an etching gas is used, and a second etching step is performed by wet etching in which an etchant is used.Type: GrantFiled: May 27, 2014Date of Patent: September 1, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunichi Ito, Miyuki Hosoba, Hideomi Suzawa, Shinya Sasagawa, Taiga Muraoka
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Publication number: 20150236166Abstract: Provided is a miniaturized transistor with stable and high electrical characteristics with high yield. In a semiconductor device including the transistor in which an oxide semiconductor film, a gate insulating film, and a gate electrode layer are stacked in this order, a first sidewall insulating layer is provided in contact with a side surface of the gate electrode layer, and a second sidewall insulating layer is provided to cover a side surface of the first sidewall insulating layer. The first sidewall insulating layer is an aluminum oxide film in which a crevice with an even shape is formed on its side surface. The second sidewall insulating layer is provided to cover the crevice. A source electrode layer and a drain electrode layer are provided in contact with the oxide semiconductor film and the second sidewall insulating layer.Type: ApplicationFiled: April 30, 2015Publication date: August 20, 2015Inventors: Motomu KURATA, Shinya SASAGAWA, Taiga MURAOKA, Tetsuhiro TANAKA, Junichi KOEZUKA
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Patent number: 9076825Abstract: When an oxide semiconductor film is microfabricated to have an island shape, with the use of a hard mask, unevenness of an end portion of the oxide semiconductor film can be suppressed. Specifically, a hard mask is formed over the oxide semiconductor film, a resist is formed over the hard mask, light exposure is performed to form a resist mask, the hard mask is processed using the resist mask as a mask, the oxide semiconductor film is processed using the processed hard mask as a mask, the resist mask and the processed hard mask are removed, a source electrode and a drain electrode are formed in contact with the processed oxide semiconductor film, a gate insulating film is formed over the source electrode and the drain electrode, and a gate electrode is formed over the gate insulating film, the gate electrode overlapping with the oxide semiconductor film.Type: GrantFiled: January 23, 2014Date of Patent: July 7, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yoshiaki Yamamoto, Koichi Ito, Motomu Kurata, Taiga Muraoka, Daigo Ito
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Patent number: 9048321Abstract: Provided is a miniaturized transistor with stable and high electrical characteristics with high yield. In a semiconductor device including the transistor in which an oxide semiconductor film, a gate insulating film, and a gate electrode layer are stacked in this order, a first sidewall insulating layer is provided in contact with a side surface of the gate electrode layer, and a second sidewall insulating layer is provided to cover a side surface of the first sidewall insulating layer. The first sidewall insulating layer is an aluminum oxide film in which a crevice with an even shape is formed on its side surface. The second sidewall insulating layer is provided to cover the crevice. A source electrode layer and a drain electrode layer are provided in contact with the oxide semiconductor film and the second sidewall insulating layer.Type: GrantFiled: November 27, 2012Date of Patent: June 2, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Motomu Kurata, Shinya Sasagawa, Taiga Muraoka, Tetsuhiro Tanaka, Junichi Koezuka
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Publication number: 20150079730Abstract: An object is to establish a processing technique in manufacture of a semiconductor device in which an oxide semiconductor is used. A gate electrode is formed over a substrate, a gate insulating layer is formed over the gate electrode, an oxide semiconductor layer is formed over the gate insulating layer, the oxide semiconductor layer is processed by wet etching to form an island-shaped oxide semiconductor layer, a conductive layer is formed to cover the island-shaped oxide semiconductor layer, the conductive layer is processed by dry etching to form a source electrode, and a drain electrode and part of the island-shaped oxide semiconductor layer is removed by dry etching to form a recessed portion in the island-shaped oxide semiconductor layer.Type: ApplicationFiled: November 20, 2014Publication date: March 19, 2015Inventors: Hideomi SUZAWA, Shinya SASAGAWA, Taiga MURAOKA
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Patent number: 8980685Abstract: An object is to manufacture a semiconductor device including an oxide semiconductor at low cost with high productivity in such a manner that a photolithography process is simplified by reducing the number of light-exposure masks In a method for manufacturing a semiconductor device including a channel-etched inverted-staggered thin film transistor, an oxide semiconductor film and a conductive film are etched using a mask layer formed with the use of a multi-tone mask which is a light-exposure mask through which light is transmitted so as to have a plurality of intensities. In etching steps, a first etching step is performed by wet etching in which an etchant is used, and a second etching step is performed by dry etching in which an etching gas is used.Type: GrantFiled: February 27, 2014Date of Patent: March 17, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hideomi Suzawa, Shinya Sasagawa, Taiga Muraoka, Shunichi Ito, Miyuki Hosoba