Abstract: A disk drive control system using a disk controller enables a host processor system to issue a data read/write command to a disk controller before a disk drive is brought into an access-enable state. Since a pseudo-ready signal is fixed at the active level the host processor system issues the data read/write command to the disk controller. Once the data read/write command has been issued the host processor system can perform processes other than disk control.

Abstract: A direct memory access (DMA); controller for controlling data transfer between a memory and an input/output (I/O) device comprises an address counter for counting an address to be supplied to the memory, and a read/write controller for controlling a read/write operation between the memory and the I/O device. A jump start address register is provided to hold a jump start address, and an address comparator compares a content of the address counter with a content of the jump start address register. When the address comparator detects consistence between the content of the address counter and the content of the jump start address register, the read/write controller operates to stop the read/write operation between the memory and the I/O device.