Patents by Inventor Taikan Iinuma

Taikan Iinuma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7754517
    Abstract: A semiconductor layer is prepared in which a silicon substrate, a BOX layer and an SOI layer are laminated in this order. A silicon diode section used as an infrared detection portion is formed in the SOI layer. Further, an isolation portion is formed so as to extend from the SOI layer to a predetermined depth of the silicon substrate via the BOX layer. The isolation portion is formed so as to surround an area in which the silicon diode section is formed, and have the form of a circle or a regular polygon more than a regular pentagon in shape. A protective film is formed on the surface of the SOI layer. Thereafter, etching holes that penetrate the protective film, the SOI layer and the BOX layer are formed. The silicon substrate corresponding to each area surrounded by the isolation portion is etched using the etching holes.
    Type: Grant
    Filed: March 6, 2009
    Date of Patent: July 13, 2010
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Taikan Iinuma
  • Publication number: 20090275166
    Abstract: A semiconductor layer is prepared in which a silicon substrate, a BOX layer and an SOI layer are laminated in this order. A silicon diode section used as an infrared detection portion is formed in the SOI layer. Further, an isolation portion is formed so as to extend from the SOI layer to a predetermined depth of the silicon substrate via the BOX layer. The isolation portion is formed so as to surround an area in which the silicon diode section is formed, and have the form of a circle or a regular polygon more than a regular pentagon in shape. A protective film is formed on the surface of the SOI layer. Thereafter, etching holes that penetrate the protective film, the SOI layer and the BOX layer are formed. The silicon substrate corresponding to each area surrounded by the isolation portion is etched using the etching holes.
    Type: Application
    Filed: March 6, 2009
    Publication date: November 5, 2009
    Applicant: OKI SEMICONDUCTOR CO., LTD.
    Inventor: Taikan Iinuma
  • Patent number: 7368364
    Abstract: A plurality of element forming regions and an element isolation structural section forming region which separates the plurality of element forming regions from one another, are set to a substrate. A first thermal oxide film is formed. An HfSiON film is formed. Heating processing is done. A silicon nitride film is formed. A trench is formed which extends from an upper surface of the substrate, corresponding to the element isolation structural section forming region to within the substrate. A trench oxide film is formed. A precursor embedded oxide film is formed. The precursor embedded oxide film is removed as a height lower than the upper surface of the silicon nitride film. Then, the silicon nitride film is removed. The HfSiON film and the first thermal oxide film are removed. A second thermal oxide film is formed on an exposed surface of the substrate from which the HfSiON film and the first thermal oxide film are removed.
    Type: Grant
    Filed: June 16, 2006
    Date of Patent: May 6, 2008
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Taikan Iinuma
  • Patent number: 7323394
    Abstract: A method of producing an element separation structure includes the steps of: forming a first thermal oxide film on the substrate; forming a silicon nitride film on the first thermal oxide film; removing the first thermal oxide film and the silicon nitride film in an element separation structure forming region; forming a groove portion in the element separation structure forming region; forming a groove portion oxide film in the groove portion; forming a pre-filling oxide film for filling the groove portion; removing the pre-filling oxide film; forming a resist layer on the silicon nitride film and the pre-filling oxide film; forming a resist mask on the element separation structure forming region; removing the silicon nitride film and the first thermal oxide film; forming a second thermal oxide film on the substrate; and removing the second thermal oxide film and leveling the pre-filling oxide film to form a filling portion.
    Type: Grant
    Filed: September 15, 2005
    Date of Patent: January 29, 2008
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Taikan Iinuma
  • Publication number: 20060073671
    Abstract: A method of producing an element separation structure includes the steps of: forming a first thermal oxide film on the substrate; forming a silicon nitride film on the first thermal oxide film; removing the first thermal oxide film and the silicon nitride film in an element separation structure forming region; forming a groove portion in the element separation structure forming region; forming a groove portion oxide film in the groove portion; forming a pre-filling oxide film for filling the groove portion; removing the pre-filling oxide film; forming a resist layer on the silicon nitride film and the pre-filling oxide film; forming a resist mask on the element separation structure forming region; removing the silicon nitride film and the first thermal oxide film; forming a second thermal oxide film on the substrate; and removing the second thermal oxide film and leveling the pre-filling oxide film to form a filling portion.
    Type: Application
    Filed: September 15, 2005
    Publication date: April 6, 2006
    Inventor: Taikan Iinuma
  • Patent number: 7022584
    Abstract: A semiconductor device is improved in reliability by suppressing the electric-field concentration at a top edge of a trench or the leak current at a bottom edge thereof. A first thermal oxide film is formed by carrying out low-temperature wet oxidation at a silicon substrate heating temperature of approximately 950° C., extending from over a bottom surface of the trench formed in a main surface of a silicon substrate to an intermediate point on a sidewall of the trench. Thereafter, a second thermal oxide film is formed by carrying out high-temperature dry oxidation at a silicon substrate heating temperature of approximately 1100° C., extending from the intermediate point to over the main surface of the silicon substrate outside the trench.
    Type: Grant
    Filed: January 21, 2004
    Date of Patent: April 4, 2006
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Taikan Iinuma
  • Publication number: 20050070089
    Abstract: A semiconductor device is improved in reliability by suppressing the electric-field concentration at a top edge of a trench or the leak current at a bottom edge thereof. A first thermal oxide film is formed by carrying out low-temperature wet oxidation at a silicon substrate heating temperature of approximately 950° C., extending from over a bottom surface of the trench formed in a main surface of a silicon substrate to an intermediate point on a sidewall of the trench. Thereafter, a second thermal oxide film is formed by carrying out high-temperature dry oxidation at a silicon substrate heating temperature of approximately 1100° C., extending from the intermediate point to over the main surface of the silicon substrate outside the) trench.
    Type: Application
    Filed: January 21, 2004
    Publication date: March 31, 2005
    Inventor: Taikan Iinuma