Patents by Inventor Taikan Kanou

Taikan Kanou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230299221
    Abstract: A photoelectric conversion apparatus includes a plurality of photoelectric conversion circuits configured to be arranged in a semiconductor layer having a first plane and a second plane. The plurality of photoelectric conversion circuits is individually isolated by an isolation structure. The semiconductor layer includes a plurality of trench portions arranged on the first plane of each of the photoelectric conversion circuits. The plurality of trench portions is configured of a first trench portion extending in a first direction as an in-plane direction of the first plane and a second trench portion extending in a second direction as an in-plane direction of the first plane intersecting with the first direction. A filler member and an airgap are arranged in an interior of a trench portion at a position where the first trench portion and the second trench portion intersect with each other.
    Type: Application
    Filed: March 3, 2023
    Publication date: September 21, 2023
    Inventors: TAIKAN KANOU, ALICE EHARA
  • Publication number: 20230090385
    Abstract: A photoelectric conversion apparatus comprising an avalanche diode disposed in a semiconductor layer having a first surface and a second surface opposite the first surface. The avalanche diode includes a first semiconductor region of first conductivity type disposed at a first depth and a second semiconductor region of second conductivity type disposed at a second depth deeper than the first depth with respect to the second surface. An oxide film and a protective film stacked on the oxide film are disposed on the second surface of the semiconductor layer. There is a point at which dsio>(?sio/?prot)×dprot/2 is satisfied, where dsio is a thickness of the oxide film, dprot is a thickness of the protective film, ?sio is a relative permittivity of the oxide film, and ?prot is a relative permittivity of the protective film.
    Type: Application
    Filed: September 16, 2022
    Publication date: March 23, 2023
    Inventors: Kazuhiro Morimoto, Junji Iwata, Taikan Kanou
  • Patent number: 9081284
    Abstract: A method of manufacturing a semiconductor device including a first region and a second region contacting the first region along a boundary line, includes forming a pattern having an on-boundary-line line portion with a width defined by a first line which is arranged in the first region and is parallel to the boundary line, and a second line which is arranged in the second region and is parallel to the boundary line. The forming the pattern includes independently performing, for a photoresist applied on a substrate, first exposure for defining the first line, and second exposure for defining the second line, and developing the photoresist having undergone the individually performing the first exposure and the second exposure.
    Type: Grant
    Filed: February 21, 2013
    Date of Patent: July 14, 2015
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Taikan Kanou, Masaru Fujimura
  • Patent number: 9024457
    Abstract: A method for manufacturing a semiconductor device includes a first photolithography step of forming a first device pattern corresponding to a first pattern, and a plurality of alignment marks corresponding to a plurality of marks, upon a step of exposing the entire device region in one shot using a first mask including the first pattern and the plurality of marks, and a second photolithography step of, after the first photolithography step, forming second device patterns respectively corresponding to second patterns in a plurality of divided regions which form the device region, upon steps of individually exposing the plurality of divided regions using second masks each including the second pattern corresponding thereto.
    Type: Grant
    Filed: July 25, 2012
    Date of Patent: May 5, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventor: Taikan Kanou
  • Publication number: 20150054998
    Abstract: A solid-state imaging apparatus includes a plurality of pixels arranged in an array, each including a photoelectric converter and a transfer transistor, a driving circuit configured to supply a control signal to the transfer transistor of each of the plurality of pixels, and a plurality of driving lines connecting the transfer transistors of the plurality of pixels and the driving circuit. The plurality of pixels include a first pixel and a second pixel connected to the same driving line. A distance from the driving circuit to the first pixel is longer than a distance from the driving circuit to the second pixel. A driving force of the transfer transistor in the first pixel is lower than a driving force of the transfer transistor in the second pixel.
    Type: Application
    Filed: August 8, 2014
    Publication date: February 26, 2015
    Inventor: Taikan Kanou
  • Publication number: 20130032956
    Abstract: A method for manufacturing a semiconductor device includes a first photolithography step of forming a first device pattern corresponding to a first pattern, and a plurality of alignment marks corresponding to a plurality of marks, upon a step of exposing the entire device region in one shot using a first mask including the first pattern and the plurality of marks, and a second photolithography step of, after the first photolithography step, forming second device patterns respectively corresponding to second patterns in a plurality of divided regions which form the device region, upon steps of individually exposing the plurality of divided regions using second masks each including the second pattern corresponding thereto.
    Type: Application
    Filed: July 25, 2012
    Publication date: February 7, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Taikan Kanou