Patents by Inventor Taiki HOSHI

Taiki HOSHI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250261430
    Abstract: A semiconductor device includes a semiconductor substrate, an alloy layer containing a constituent element of the semiconductor substrate as a main component and an upper metal layer formed on the alloy layer. A plurality of minute regions containing an inert gas is discretely arranged at an interface between the alloy layer and the upper metal layer. Not less than 90% of a plurality of the minute regions has an arc shape whose opening is the widest portion.
    Type: Application
    Filed: December 3, 2024
    Publication date: August 14, 2025
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yusuke MIYATA, Yuki HARAGUCHI, Haruhiko MINAMITAKE, Taiki HOSHI, Shinya AKAO, Hidenori KOKETSU
  • Publication number: 20240072124
    Abstract: Provided is a semiconductor device and a method of manufacturing a semiconductor device in which deterioration of energy loss is suppressed. The semiconductor device includes: a drift layer of a first conductivity type provided between a first main surface and a second main surface of a semiconductor substrate; and a field stop layer of the first conductivity type having an impurity concentration higher than that of the drift layer and provided between the drift layer and the second main surface. A net carrier concentration profile at room temperature of the field stop layer have at least one peak from the second main surface toward the first main surface. A hydrogen atom concentration profile of the field stop layer have at least two peaks from the second main surface toward the first main surface. The hydrogen atom concentration profile has more peaks than the net carrier concentration profile.
    Type: Application
    Filed: June 13, 2023
    Publication date: February 29, 2024
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yusuke MIYATA, Kenji SUZUKI, Yuki HARAGUCHI, Haruhiko MINAMITAKE, Taiki HOSHI, Hidenori KOKETSU
  • Patent number: 11881504
    Abstract: A semiconductor device according to the present disclosure includes: a first conductivity-type silicon substrate including a cell part and a termination part surrounding the cell part in plan view; a first conductivity-type emitter layer provided on a front surface of the silicon substrate in the cell part; a second conductivity-type collector layer provided on a back surface of the silicon substrate in the cell part; a first conductivity-type drift layer provided between the emitter layer and the collector layer; a trench gate provided to reach the drift layer from a front surface of the emitter layer; and a second conductivity-type well layer provided on the front surface of the silicon substrate in the termination part. Vacancies included in a crystal defect in the cell part are less than vacancies included in a crystal defect in the termination part.
    Type: Grant
    Filed: September 13, 2021
    Date of Patent: January 23, 2024
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kenji Suzuki, Yuki Haraguchi, Haruhiko Minamitake, Taiki Hoshi, Takuya Yoshida, Hidenori Koketsu, Yusuke Miyata, Akira Kiyoi
  • Publication number: 20230420524
    Abstract: A first buffer layer includes: a first region containing protons and in contact with a drift layer; a second region between the first region and a first principal surface containing protons, and in contact with the first region; and a third region between the second region of the first buffer layer and the first principal surface. An impurity concentration profile of the first buffer layer includes: a maximum value in the second region; a kink at a boundary point between the first region and the second region, relaxing or stopping a decrease from the maximum value; a value at the boundary point higher than or equal to 80% of the maximum value; and a distribution of the third region longer than or equal to 5 ?m and having an impurity concentration lower than the value at the boundary point and lower than or equal to 5.0×1014/cm3.
    Type: Application
    Filed: April 26, 2023
    Publication date: December 28, 2023
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kenji SUZUKI, Yuki HARAGUCHI, Haruhiko MINAMITAKE, Taiki HOSHI, Hidenori KOKETSU, Yusuke MIYATA
  • Publication number: 20230387218
    Abstract: A semiconductor device includes a drift region that is of first conductive type and formed in a semiconductor substrate; a hydrogen buffer region that is of first conductive type, positioned on the back surface side of the drift region, contains hydrogen as impurities, and has impurity concentration higher than impurity concentration of the drift region; a flat region that is of first conductive type, positioned on the back surface side of the hydrogen buffer region, and has impurity concentration higher than impurity concentration of the drift region; and a carrier injection layer that is of first or second conductive type, positioned on the back surface side of the flat region, and has impurity concentration higher than impurity concentrations of the hydrogen buffer region and the flat region. The hydrogen buffer region and the flat region each have a constant oxygen concentration of 1E16 atoms/cm3 to 6E17 atoms/cm3 inclusive.
    Type: Application
    Filed: February 1, 2023
    Publication date: November 30, 2023
    Applicant: Mitsubishi Electric Corporation
    Inventors: Taiki HOSHI, Kenji SUZUKI, Yuki HARAGUCHI, Haruhiko MINAMITAKE, Hidenori KOKETSU, Yusuke MIYATA, Akira KIYOI
  • Publication number: 20220181435
    Abstract: A semiconductor device according to the present disclosure includes: a first conductivity-type silicon substrate including a cell part and a termination part surrounding the cell part in plan view; a first conductivity-type emitter layer provided on a front surface of the silicon substrate in the cell part; a second conductivity-type collector layer provided on a back surface of the silicon substrate in the cell part; a first conductivity-type drift layer provided between the emitter layer and the collector layer; a trench gate provided to reach the drift layer from a front surface of the emitter layer; and a second conductivity-type well layer provided on the front surface of the silicon substrate in the termination part. Vacancies included in a crystal defect in the cell part are less than vacancies included in a crystal defect in the termination part.
    Type: Application
    Filed: September 13, 2021
    Publication date: June 9, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kenji SUZUKI, Yuki HARAGUCHI, Haruhiko MINAMITAKE, Taiki HOSHI, Takuya YOSHIDA, Hidenori KOKETSU, Yusuke MIYATA, Akira KIYOI