Abstract: An etching method comprises (a) providing a substrate in a chamber, the substrate including a silicon-containing film and a mask on the silicon-containing film; and (b) etching the silicon-containing film, including (b-1) etching the silicon-containing film using plasma generated from a first process gas, the first process gas containing a hydrogen fluoride gas and a reaction control gas to control a reaction between hydrogen fluoride and the silicon-containing film, the first process gas containing, as the reaction control gas, at least one of a reaction accelerator gas to accelerate the reaction or a reaction inhibitor gas to inhibit the reaction, and (b-2) etching the silicon-containing film using plasma generated from a second process gas, the second process gas containing a hydrogen fluoride gas, and containing at least one of a reaction accelerator gas to accelerate the reaction or a reaction inhibitor gas to inhibit the reaction.

Abstract: There is provision of an etching method including a step of preparing a substrate over which a boron film or a boron-containing film is formed, a step of supplying a process gas containing chlorine gas, fluorine-containing gas, and hydrogen-containing gas, and a step of etching the boron film or the boron-containing film via a mask using a plasma formed from the process gas.

Abstract: There is provision of an etching method including a step of preparing a substrate over which a boron film or a boron-containing film is formed, a step of supplying a process gas containing chlorine gas, fluorine-containing gas, and hydrogen-containing gas, and a step of etching the boron film or the boron-containing film via a mask using a plasma formed from the process gas.

Abstract: A semiconductor module comprises a mounting board. A plurality of power switching device chips are mounted on the mounting board by flip-chip bonding. The chip has an upper surface and a lower surface and is configured to face the upper surface toward the mounting board. A drive IC chip is mounted on the mounting board by flip-chip bonding. The drive IC chip is operative to drive gates of transistors formed in the plurality of power switching device chips. A plurality of heat sink members are located on the lower surfaces of the plurality of power switching device chips, respectively. A resinous member is provided to seal the plurality of power switching device chips and the drive IC chip in a single package.

Abstract: A semiconductor module comprises a mounting board. A plurality of power switching device chips are mounted on the mounting board by flip-chip bonding. The chip has an upper surface and a lower surface and is configured to face the upper surface toward the mounting board. A drive IC chip is mounted on the mounting board by flip-chip bonding. The drive IC chip is operative to drive gates of transistors formed in the plurality of power switching device chips. A plurality of heat sink members are located on the lower surfaces of the plurality of power switching device chips, respectively. A resinous member is provided to seal the plurality of power switching device chips and the drive IC chip in a single package.

Abstract: A semiconductor module comprises a mounting board. A plurality of power switching device chips are mounted on the mounting board by flip-chip bonding. The chip has an upper surface and a lower surface and is configured to face the upper surface toward the mounting board. A drive IC chip is mounted on the mounting board by flip-chip bonding. The drive IC chip is operative to drive gates of transistors formed in the plurality of power switching device chips. A plurality of heat sink members are located on the lower surfaces of the plurality of power switching device chips, respectively. A resinous member is provided to seal the plurality of power switching device chips and the drive IC chip in a single package.

Abstract: A semiconductor module comprises a mounting board. A plurality of power switching device chips are mounted on the mounting board by flip-chip bonding. The chip has an upper surface and a lower surface and is configured to face the upper surface toward the mounting board. A drive IC chip is mounted on the mounting board by flip-chip bonding. The drive IC chip is operative to drive gates of transistors formed in the plurality of power switching device chips. A plurality of heat sink members are located on the lower surfaces of the plurality of power switching device chips, respectively. A resinous member is provided to seal the plurality of power switching device chips and the drive IC chip in a single package.

Abstract: A semiconductor module comprises a mounting board. A plurality of power switching device chips are mounted on the mounting board by flip-chip bonding. The chip has an upper surface and a lower surface and is configured to face the upper surface toward the mounting board. A drive IC chip is mounted on the mounting board by flip-chip bonding. The drive IC chip is operative to drive gates of transistors formed in the plurality of power switching device chips. A plurality of heat sink members are located on the lower surfaces of the plurality of power switching device chips, respectively. A resinous member is provided to seal the plurality of power switching device chips and the drive IC chip in a single package.

Abstract: A semiconductor module comprises a mount member. A first semiconductor chip having an upper surface and a lower surface is mounted via flip chip bonding on the mount member with the upper surface faced to the mount member. The upper surface includes a drain electrode and a gate formed therein and the lower surface includes a source electrode formed therein. A second semiconductor chip having an upper surface and a lower surface is mounted via flip chip bonding on the mount member with the upper surface faced to the mount member. The upper surface includes a source electrode and a gate formed therein and the lower surface includes a drain electrode formed therein. An electrically conductive and thermally radiative member is disposed to electrically connect the source electrode of the first semiconductor chip with the drain electrode of the second semiconductor chip and cover the lower surfaces of the semiconductor chips.