Patents by Inventor Taisuke Iwai
Taisuke Iwai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20120236502Abstract: According to an aspect of the embodiments, a sheet-shaped structure includes a bundle structure that includes a plurality of line-shaped structures of carbon atoms, a covering layer that covers the line-shaped structures in longitudinal directions of the line-shaped structures, respectively, and a filling layer that is disposed between the line-shaped structures covered with the covering layer.Type: ApplicationFiled: February 23, 2012Publication date: September 20, 2012Applicant: FUJITSU LIMITEDInventors: Yoshitaka Yamaguchi, Taisuke Iwai, Masaaki Norimatsu, Shinichi Hirose, Yohei Yagishita, Yukie Sakita
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Patent number: 8258060Abstract: The sheet structure includes a plurality of linear structure bundles including a plurality of linear structures of carbon atoms arranged at a first gap, and arranged at a second gap larger than the first gap, a graphite layer formed in a region between the plurality of linear structure bundles and connected to the plurality of linear structure bundles, and a filling layer filled in the first gap and the second gap and retaining the plurality of linear structure bundles and the graphite layer.Type: GrantFiled: August 13, 2010Date of Patent: September 4, 2012Assignee: Fujitsu LimitedInventors: Daiyu Kondo, Taisuke Iwai, Yoshitaka Yamaguchi, Ikuo Soga
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Publication number: 20120218713Abstract: The electronic device includes a heat generator 54, a heat radiator 58, and a heat radiation material 56 disposed between the heat generator 54 and the heat radiator 58 and including a plurality of linear structures 12 of carbon atoms and a filling layer 14 formed of a thermoplastic resin and disposed between the plurality of linear structures 12.Type: ApplicationFiled: May 7, 2012Publication date: August 30, 2012Applicant: Fujitsu LimitedInventors: Yoshitaka Yamaguchi, Taisuke Iwai, Shinichi Hirose, Daiyu Kondo, Ikuo Soga, Yohei Yagishita, Yukie Sakita
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Publication number: 20120218715Abstract: A method of manufacturing an electronic component includes disposing a heat radiation material including a plurality of linear structures of carbon atoms and a filling layer of a thermoplastic resin provided among the plurality of linear structures above a first substrate, disposing a blotting paper above the heat radiation material, making a heat treatment at a temperature higher than a melting temperature of the thermoplastic resin and absorbing the thermoplastic resin above the plurality of linear structures with the absorption paper, removing the blotting paper, and adhering the heat radiation material to the first substrate by cooling to solidify the thermoplastic resin.Type: ApplicationFiled: November 30, 2011Publication date: August 30, 2012Applicant: FUJITSU LIMITEDInventors: Shinichi HIROSE, Taisuke Iwai, Yoshitaka Yamaguchi, Yohei Yagishita, Yukie Sakita, Masaaki Norimatsu
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Publication number: 20120153455Abstract: A semiconductor device includes a semiconductor chip having an electric circuit; and a cooling device including at least one channel serving as a flow path through which coolant flows, an external surface including projections, and a metallic layer formed over the external surface including the projections. In the semiconductor device, the projections of the external surface of the cooling device are brought into contact with a first surface of the semiconductor chip via the metallic layer such that the semiconductor chip is cooled by allowing the coolant to flow through the channel formed in the cooling device.Type: ApplicationFiled: September 23, 2011Publication date: June 21, 2012Applicant: FUJITSU LIMITEDInventors: Yoshihiro Mizuno, Ikuo Soga, Osamu Tsuboi, Taisuke Iwai
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Patent number: 8194407Abstract: The electronic device includes a heat generator 54, a heat radiator 58, and a heat radiation material 56 disposed between the heat generator 54 and the heat radiator 58 and including a plurality of linear structures 12 of carbon atoms and a filling layer 14 formed of a thermoplastic resin and disposed between the plurality of linear structures 12.Type: GrantFiled: November 6, 2009Date of Patent: June 5, 2012Assignee: Fujitsu LimitedInventors: Yoshitaka Yamaguchi, Taisuke Iwai, Shinichi Hirose, Daiyu Kondo, Ikuo Soga, Yohei Yagishita, Yukie Sakita
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Publication number: 20120042922Abstract: The graphite structure includes a plurality of domains of graphite where a layer body of graphene sheets is curved in domelike, wherein the plurality of domains are arranged in plane, and the domains adjacent each other are in contact with each other.Type: ApplicationFiled: November 1, 2011Publication date: February 23, 2012Applicant: FUJITSU LIMITEDInventors: Daiyu Kondo, Shintaro Sato, Taisuke Iwai
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Publication number: 20110284049Abstract: In order to achieve a thermoelectric transducer exhibiting a higher conversion efficiency and an electronic apparatus including such a thermoelectric transducer, a thermoelectric conversion device is provided, including a semiconductor stacked structure including semiconductor layers stacked with each other, the semiconductor layers being made from different semiconductor materials, in which a material and a composition of each semiconductor layer in the semiconductor stacked structure are selected so as to avoid conduction-band or valence-band discontinuity.Type: ApplicationFiled: May 26, 2011Publication date: November 24, 2011Applicant: FUJITSU LIMITEDInventor: Taisuke Iwai
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Patent number: 8029760Abstract: According to a method of manufacturing carbon nanotubes, minute concavities and convexities are formed at a surface of a substrate, a catalyst metal layer having a predetermined film thickness is formed on the surface having the concavities and convexities, the substrate is subject to a heat treatment at a predetermined temperature to change the catalyst metal layer into a plurality of isolated fine particles. The catalyst metal fine particles have a uniform particle diameter and uniform distribution. Then, the substrate supporting the plurality of fine particles is placed in a carbon-containing gas atmosphere to grow carbon nanotubes on the catalyst metal fine particles by a CVD method using the carbon-containing gas. The carbon nanotubes can be formed to have a desired diameter and a desired shell number with superior reproducibility.Type: GrantFiled: September 29, 2008Date of Patent: October 4, 2011Assignee: Fujitsu LimitedInventors: Daiyu Kondo, Akio Kawabata, Shintaro Sato, Taisuke Iwai, Mizuhisa Nihei
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Publication number: 20100327444Abstract: The sheet structure includes a plurality of linear structure bundles including a plurality of linear structures of carbon atoms arranged at a first gap, and arranged at a second gap larger than the first gap, a graphite layer formed in a region between the plurality of linear structure bundles and connected to the plurality of linear structure bundles, and a filling layer filled in the first gap and the second gap and retaining the plurality of linear structure bundles and the graphite layer.Type: ApplicationFiled: August 13, 2010Publication date: December 30, 2010Applicant: FUJITSU LIMITEDInventors: Daiyu Kondo, Taisuke Iwai, Yoshitaka Yamaguchi, Ikuo Soga
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Publication number: 20100261343Abstract: Electrodes formed in a partial surface area of a semiconductor substrate and distal ends of conductive nanotubes bristled on a surface of a growth substrate, are bombarded with rare gas plasma. The distal ends of the conductive nanotubes bombarded with the rare gas plasma are brought into contact with the electrodes bombarded with the rare gas plasma to fix the conductive nanotubes to the electrodes. The growth substrate is separated from the semiconductor substrate in such a manner that the conductive nanotubes fixed to the electrodes remain on the electrodes formed on the semiconductor substrate.Type: ApplicationFiled: June 25, 2010Publication date: October 14, 2010Applicant: FUJITSU LIMITEDInventors: Masataka Mizukoshi, Taisuke Iwai
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Publication number: 20100124025Abstract: The electronic device includes a heat generator 54, a heat radiator 58, and a heat radiation material 56 disposed between the heat generator 54 and the heat radiator 58 and including a plurality of linear structures 12 of carbon atoms and a filling layer 14 formed of a thermoplastic resin and disposed between the plurality of linear structures 12.Type: ApplicationFiled: November 6, 2009Publication date: May 20, 2010Applicant: FUJITSU LIMITEDInventors: Yoshitaka Yamaguchi, Taisuke Iwai, Shinichi Hirose, Daiyu Kondo, Ikuo Soga, Yohei Yagishita, Yukie Sakita
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Publication number: 20100027221Abstract: The sheet structure includes a plurality of linear structure bundles 12 each of which comprises a plurality of linear structures of carbon atoms arranged, spaced from each other at a first gap and which are arranged at a second gap which is larger than the first gap; and a filling layer 14 filled in the first gap and the second gap and supporting the plurality of linear structure bundles 12.Type: ApplicationFiled: October 21, 2008Publication date: February 4, 2010Applicant: FUJITSU LIMITEDInventors: Taisuke IWAI, Daiyu KONDO, Yoshitaka YAMAGUCHI, Ikuo SOGA, Shinichi HIROSE
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Patent number: 7633148Abstract: A plurality of conductive pads (2) are formed on a mounting surface of a mounting board. Conductive pads (11) are formed on a principal surface of a semiconductor chip (10) at positions corresponding to the conductive pads of the mounting board, when the principal surface faces toward the mounting board. A plurality of conductive nanotubes (12) extend from the conductive pads of one of the mounting board and the semiconductor chip. A press mechanism (3) presses the semiconductor chip against the mounting board and restricts a position of the semiconductor chip on the mounting surface to mount the semiconductor chip on the mounting board, in a state that tips of the conductive nanotubes are in contact with the corresponding conductive pads not formed with the conductive nanotubes.Type: GrantFiled: February 15, 2007Date of Patent: December 15, 2009Assignee: Fujitsu LimitedInventors: Yuji Awano, Masataka Mizukoshi, Taisuke Iwai, Tomoji Nakamura
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Publication number: 20090237886Abstract: The sheet structure includes a plurality of linear structures of carbon atoms, a filling layer filled in gaps between the linear structures for supporting the plurality of linear structures, and a coating film formed over at least one ends of the plurality of linear structures and having a thermal conductivity of not less than 1 W/m·K.Type: ApplicationFiled: March 17, 2009Publication date: September 24, 2009Applicant: FUJITSU LIMITEDInventors: Taisuke IWAI, Daiyu KONDO, Yoshitaka YAMAGUCHI, Ikuo SOGA, Shinichi HIROSE
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Publication number: 20090035209Abstract: According to a method of manufacturing carbon nanotubes, minute concavities and convexities are formed at a surface of a substrate, a catalyst metal layer having a predetermined film thickness is formed on the surface having the concavities and convexities, the substrate is subject to a heat treatment at a predetermined temperature to change the catalyst metal layer into a plurality of isolated fine particles. The catalyst metal fine particles have a uniform particle diameter and uniform distribution. Then, the substrate supporting the plurality of fine particles is placed in a carbon-containing gas atmosphere to grow carbon nanotubes on the catalyst metal fine particles by a CVD method using the carbon-containing gas. The carbon nanotubes can be formed to have a desired diameter and a desired shell number with superior reproducibility.Type: ApplicationFiled: September 29, 2008Publication date: February 5, 2009Applicant: FUJITSU LIMITEDInventors: Daiyu KONDO, Akio KAWABATA, Shintaro SATO, Taisuke IWAI, Mizuhisa NIHEI
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Publication number: 20070267735Abstract: A plurality of conductive pads (2) are formed on a mounting surface of a mounting board. Conductive pads (11) are formed on a principal surface of a semiconductor chip (10) at positions corresponding to the conductive pads of the mounting board, when the principal surface faces toward the mounting board. A plurality of conductive nanotubes (12) extend from the conductive pads of one of the mounting board and the semiconductor chip. A press mechanism (3) presses the semiconductor chip against the mounting board and restricts a position of the semiconductor chip on the mounting surface to mount the semiconductor chip on the mounting board, in a state that tips of the conductive nanotubes are in contact with the corresponding conductive pads not formed with the conductive nanotubes.Type: ApplicationFiled: February 15, 2007Publication date: November 22, 2007Applicant: FUJITSU LIMITEDInventors: Yuji Awano, Masataka Mizukoshi, Taisuke Iwai, Tomoji Nakamura
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Patent number: 6897732Abstract: The amplifier includes two or more amplification stages. The rear amplification stage amplifies an output signal of a front stage transistor is comprised of two or more transistors connected in parallel. Bias point of the front stage transistor and a first rear stage transistor is class AB. Base bias of a second rear stage transistor is controlled according to an RF input by a rear stage DC bias control circuit. As a result, the second rear stage transistor is turned on when the output power is high, whereas it is turned off when the output power is low or medium.Type: GrantFiled: October 11, 2001Date of Patent: May 24, 2005Assignee: Fujitsu LimitedInventor: Taisuke Iwai
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Publication number: 20020113656Abstract: The amplifier includes two or more amplification stages. The rear amplification stage amplifies an output signal of a front stage transistor is comprised of two or more transistors connected in parallel. Bias point of the front stage transistor and a first rear stage transistor is class AB. Base bias of a second rear stage transistor is controlled according to an RF input by a rear stage DC bias control circuit. As a result, the second rear stage transistor is turned on when the output power is high, whereas it is turned off when the output power is low or medium.Type: ApplicationFiled: October 11, 2001Publication date: August 22, 2002Applicant: FUJITSU LIMITEDInventor: Taisuke Iwai
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Patent number: 6437649Abstract: A resistor is inserted in series with an inductor feeding a bias current and that reactance of an input matching circuit or of an output matching circuit is varied depending on variations of input signal power. The input impedance of the amplifying element is restrained from lowering even when the input signal power has increased so that a constantly satisfactory impedance matching is achieved irrespective of the input signal powers variations. Furthermore, restriction on increase of the bias current enables a limitation to be imposed on increase of the power consumption of the microwave amplifier.Type: GrantFiled: April 2, 2001Date of Patent: August 20, 2002Assignee: Fujitsu LimitedInventors: Takumi Miyashita, Taisuke Iwai