Abstract: A semiconductor device and a manufacturing method of the semiconductor device. The semiconductor device includes: a semiconductor substrate; a bottom electrode metal layer and a top electrode metal layer located on the semiconductor substrate; a resistive layer located between the bottom electrode metal layer and the top electrode metal layer, where the transverse width of the resistive layer is greater than the transverse width of the bottom electrode metal layer and/or the top electrode metal layer, and the resistive layer has a variable resistance; an oxygen barrier layer located between the bottom electrode metal layer and the top electrode metal layer, where the oxygen barrier layer is located above the resistive layer; and an oxygen grasping layer located between the bottom electrode metal layer and the top electrode metal layer, where the transverse width of the oxygen grasping layer is less than the transverse width of the resistive layer.

Abstract: A semiconductor device and a manufacturing method of the semiconductor device. The semiconductor device includes: a semiconductor substrate; a bottom electrode metal layer located in the semiconductor substrate and a top electrode metal layer located on the semiconductor substrate; a resistive layer located between the bottom electrode metal layer and the top electrode metal layer, where the resistive layer has a variable resistance; a first oxygen grasping layer located between the bottom electrode metal layer and the top electrode metal layer, where the first oxygen grasping layer is located above the resistive layer; a second oxygen grasping layer located in the bottom electrode metal layer, where upper surfaces of the semiconductor substrate, the bottom electrode metal layer, and the second oxygen grasping layer are flush, and the resistive layer covers the semiconductor substrate, the bottom electrode metal layer, and the second oxygen grasping layer.

Abstract: Disclosed in embodiments of the present application are a linear resistive element and a preparation method therefor. The linear resistive element includes a substrate unit, a function unit and an electrode unit. The substrate unit includes a substrate layer, which is configured to connect the function unit and the electrode unit. The electrode unit includes a first electrode and a second electrode. The first and second electrodes are deposited on the substrate layer, and the function unit is connected between the first and second electrodes. The function unit includes first dielectric layers and resistive layers. The first dielectric layers and the resistive layers are deposited on the substrate layer in an alternately stacked manner. A number of the resistive layers is at least two, and a conductive filament for conductively connecting the first and second electrodes is formed in each of the resistive layers.

Abstract: The present disclosure provides a semiconductor integrated circuit device and a manufacturing method therefor. In the device, an electrode in a resistive random-access memory (RRAM) cell is directly connected to a metal layer, thereby omitting the steps of filling a connection via with other metal materials (such as tungsten) and of polishing. The manufacturing process is hence simplified, and different degrees of depressions caused by polishing are correspondingly reduced. The uniformity of resistive performance of the RRAM and the quality of the semiconductor integrated circuit device are hence greatly improved. In addition, a resistive layer having a trench structure is formed by using a trench where an original connection via is located, thereby embedding the entire RRAM cell into the trench. The structure of the RRAM cell is more compact, a gap between RRAM cells is smaller, and the requirements for miniaturization and high density can thus be better met.

Abstract: A semiconductor device and a manufacturing method of the semiconductor device. The semiconductor device includes: a semiconductor substrate; a bottom electrode metal layer and a top electrode metal layer located on the semiconductor substrate; a resistive layer located between the bottom electrode metal layer and the top electrode metal layer, where the transverse width of the resistive layer is greater than the transverse width of the bottom electrode metal layer and/or the top electrode metal layer, and the resistive layer has a variable resistance; an oxygen barrier layer located between the bottom electrode metal layer and the top electrode metal layer, where the oxygen barrier layer is located above the resistive layer; and an oxygen grasping layer located between the bottom electrode metal layer and the top electrode metal layer, where the transverse width of the oxygen grasping layer is less than the transverse width of the resistive layer.

Abstract: A semiconductor device and a manufacturing method of the semiconductor device. The semiconductor device includes: a semiconductor substrate; a bottom electrode metal layer located in the semiconductor substrate and a top electrode metal layer located on the semiconductor substrate; a resistive layer located between the bottom electrode metal layer and the top electrode metal layer, where the resistive layer has a variable resistance; a first oxygen grasping layer located between the bottom electrode metal layer and the top electrode metal layer, where the first oxygen grasping layer is located above the resistive layer; a second oxygen grasping layer located in the bottom electrode metal layer, where upper surfaces of the semiconductor substrate, the bottom electrode metal layer, and the second oxygen grasping layer are flush, and the resistive layer covers the semiconductor substrate, the bottom electrode metal layer, and the second oxygen grasping layer.

Abstract: The present disclosure discloses a method for manufacturing a resistive switching element, including: performing an etching process, a deposition process and a polishing process alternately to prepare the bottom electrode, the resistive switching layer and the top electrode; and optimizing at least one of the bottom electrode, the resistive switching materials and the oxygen storage layer by using the sidewall process when preparing the bottom electrode and the resistive switching materials, so as to reduce a contact area between the bottom electrode and the resistive switching materials, and/or reduce a contact area between the resistive switching materials and the oxygen storage layer. The method could form conductive filaments in the resistive switching layer, and a low resistive state and high resistive state are realized by forming and breaking conductive filaments.