Abstract: A semiconductor device includes a substrate, a source electrode, a drain electrode, a first gate electrode extending in a first direction and provided between the source electrode and the drain electrode, a second gate electrode provided in a region between the source electrode and the drain electrode positioned in the first direction from the first gate electrode, a gate pad provided so as to dispose the first gate electrode between the gate pad and the second gate electrode, and electrically connected to the first gate electrode, a first gate line provided above the source electrode, a second gate line provided above the source electrode and extending in a second direction that crosses the first direction, and a first guard metal layer provided between the second gate line and the drain electrode, and having at least a portion provided between the drain electrode and the source electrode.

Abstract: A semiconductor device includes: a single die pad made of a metal or metal alloy and having a first surface, a second surface that is an opposite side of the first surface, and a pair of ground leads protruding from an end edge in plan view; a signal lead arranged between the ground leads; a plurality of leads arranged around the die pad in plan view; a semiconductor chip mounted on the second surface; bonding wires connecting a signal pad of the chip and the signal lead and connecting a ground pad of the chip and the ground leads; and a mold resin covering the die pad, the signal lead, the plurality of leads, the chip, and the bonding wires; wherein an interval between the signal lead and each of the ground leads is narrower than an interval between the plurality of leads.

Abstract: A semiconductor device includes a substrate, an active region provided in the substrate, a plurality of gate fingers provided on the active region, extending in an extension direction, and arranged in an arrangement direction orthogonal to the extension direction, and a gate connection wiring commonly connected to the plurality of gate fingers and provided between the plurality of gate fingers and a first side surface of the substrate, wherein when viewed from the arrangement direction, a first position where a first end of a first gate finger as a part of the plurality of gate fingers is connected to the gate connection wiring is closer to the first side surface than a second position where a first end of a second gate finger as another part of the plurality of gate fingers is connected to the gate connection wiring.

Abstract: A high-frequency switch circuit includes a first switch configured to electrify or cut off connection between an antenna terminal and an input terminal, and a second switch configured to electrify or cut off connection between the antenna terminal and an output terminal. The first switch has a transmission line connecting the antenna terminal and the input terminal; a diode having an anode connected to a first node between the transmission line and the input terminal, and a cathode connected to a second node; and a capacitor connected to the second node and a first power supply voltage. A first control terminal is connected to the first node via a first resistor and a first inductor. The first switch further includes a charging/discharging circuit connected to a second power supply voltage and the first control terminal and charging and discharging the capacitor from the second node.

Abstract: A semiconductor device includes input and output terminals, first and second power supply terminals, first and second transistors, and a first resistance element. In the first transistor, gate and source terminals are respectively connected to the input terminal and the first power supply terminal, a drain terminal is connected to the second power supply terminal in direct current and to the output terminal, and the gate and drain terminals are connected via the first resistance element. In the second transistor, a source terminal is connected to the first power supply terminal, and gate and drain terminals are short-circuited at a node connected to the gate terminal of the first transistor in direct current. In a lower frequency region, an impedance of the first resistance element is lower than impedances of parasitic capacitances in the first transistor between the gate and drain terminals and between the gate and source terminals.

Abstract: A semiconductor device includes: a single die pad made of a metal or metal alloy and having a first surface, a second surface that is an opposite side of the first surface, and a pair of ground leads protruding from an end edge in plan view; a signal lead arranged between the ground leads; a plurality of leads arranged around the die pad in plan view; a semiconductor chip mounted on the second surface; bonding wires connecting a signal pad of the chip and the signal lead and connecting a ground pad of the chip and the ground leads; and a mold resin covering the die pad, the signal lead, the plurality of leads, the chip, and the bonding wires; wherein an interval between the signal lead and each of the ground leads is narrower than an interval between the plurality of leads.

Abstract: A high-frequency switch circuit includes a first switch configured to electrify or cut off connection between an antenna terminal and an input terminal, and a second switch configured to electrify or cut off connection between the antenna terminal and an output terminal. The first switch has a transmission line connecting the antenna terminal and the input terminal; a diode having an anode connected to a first node between the transmission line and the input terminal, and a cathode connected to a second node; and a capacitor connected to the second node and a first power supply voltage. A first control terminal is connected to the first node via a first resistor and a first inductor. The first switch further includes a charging/discharging circuit connected to a second power supply voltage and the first control terminal and charging and discharging the capacitor from the second node.

Abstract: A driving circuit includes a plurality of differential amplifier circuits each electrically connected to a power supply line. Each differential amplifier circuit includes a differential pair circuit and a series resistance circuit. In the differential pair circuit, a first transistor and a second transistor are electrically connected to the power supply line through a first load resistor and a second load resistor, respectively. A center node is electrically connected between the first transistor and the second transistor. Each differential amplifier circuit generates a differential output signal in accordance with a differential incoming signal. The series resistance circuit includes a resistor and a line element. The line element includes a signal line which extends straight with a distance between the signal line and a ground line extending in parallel thereto. The resistor and the line element are connected in series between the center node and a static potential line.

Abstract: A driving circuit includes a plurality of differential amplifier circuits each electrically connected to a power supply line. Each differential amplifier circuit includes a differential pair circuit and a series resistance circuit. In the differential pair circuit, a first transistor and a second transistor are electrically connected to the power supply line through a first load resistor and a second load resistor, respectively. A center node is electrically connected between the first transistor and the second transistor. Each differential amplifier circuit generates a differential output signal in accordance with a differential incoming signal. The series resistance circuit includes a resistor and a line element. The line element includes a signal line which extends straight with a distance between the signal line and a ground line extending in parallel thereto. The resistor and the line element are connected in series between the center node and a static potential line.

Abstract: An optical receiver circuit includes an input terminal receiving current signal from photodetector; a trans-impedance amplifier converting the current signal into voltage signal; an inductor having one end connected to the input terminal and another end connected to the input of the trans-impedance amplifier; a first variable resistor having a first end connected to the other end of the inductor, a second end receiving bias voltage, and a third end receiving a control signal, where the first variable resistor varies a resistance between the first end and the second end in accordance with the control signal; and a second variable resistor having a first end connected to the one end of the inductor, a second end receiving bias voltage, and a third end receiving a control signal, where the second variable resistor varies a resistance between the first end and the second end in accordance with the control signal.

Abstract: A driving circuit includes a first differential amplifier, wherein the first differential amplifier includes: a delay adjustment circuit that generates a second differential signal by delaying a first differential signal in response to instantaneous voltage level of the first differential signal; a differential circuit that divides a source current into a first current and a second current in response to the second differential signal; and a first load resistor and a second load resistor that generate a positive phase component and a negative phase component of the differential output signal based on the first current and the second current, wherein a third differential amplifier operates in a non-saturated region when a voltage level of the first differential signal is in an input voltage range, and operates in a saturated region when the voltage level of the first differential signal is out of the input voltage range.

Abstract: An optical receiver circuit includes an input terminal receiving current signal from photodetector; a trans-impedance amplifier converting the current signal into voltage signal; an inductor having one end connected to the input terminal and another end connected to the input of the trans-impedance amplifier; a first variable resistor having a first end connected to the other end of the inducer a second end receiving bias voltage, and a third end receiving a control signal, where the first variable resistor varies a resistance between the first end nut the second end in accordance with the control signal; and a second variable resistor having a first end connected to the one end of the inductor, a second end receiving bias voltage, and a third end receiving a control signal, where the second variable resistor varies a resistance between the first end and the second end in accordance with Me control signal.

Abstract: A level shift circuit lowers a voltage of a first differential signal by a second voltage value and outputs a lowered first differential signal as a second differential signal. A first differential circuit receives the first differential signal and outputs a third differential signal. A second emitter follower circuit receives the third differential signal at a base of a pair of second transistors. A second differential circuit receives the second differential signal at a base of a pair of third transistors. An output terminal is electrically connected to one of a first output node electrically connected to an emitter of the one of the second transistors and a collector of the one of the third transistors and a second output node electrically connected to an emitter of the another of the second transistors and a collector of the another of the third transistors and outputs a driving signal.

Abstract: A traveling wave amplifier includes two input-side lines, two output-side lines, and amplification cells. The amplification cells each include a first input terminal, a second input terminal, a first transistor including a base connected to the first input terminal and a collector connected to one output-side line, a second transistor including a base connected to the second input terminal and a collector connected to the other output-side line, a current source connected to an emitter of each of the two transistors, a first series circuit connected between the collector of the second transistor and the base of the first transistor and including a capacitor and a resistor, and a second series of circuit connected between the collector of the first transistor and the base of the second transistor and including a capacitor and a resistor.

Abstract: A driver circuit includes: a multilayer board; a differential amplifier; inductor elements; power supply electrodes; and transmission lines, one of which includes a first connection portion electrically connected to one of the power supply electrodes through one of the inductor elements, and another of which includes a second connection portion electrically connected to another of the power supply electrodes through another of the inductor elements, one end of the one transmission line being electrically connected to one output terminal, one end of the other transmission line being electrically connected to another output terminal. The multilayer board includes a first recessed portion between the first connection portion and the second connection portion, a second recessed portion between the first connection portion and the one of the power supply electrodes, and a third recessed portion between the second connection portion and the another of the power supply electrodes.

Abstract: A circuit device includes a differential circuit including differential input terminals; a differential amplifier circuit in which differential input nodes are connected to the differential input terminals; a first power supply terminal supplied with a first voltage; a second power supply terminal supplied with a second voltage; a common terminal; a first resistive element of which one end is connected to one differential input terminal and another end is connected to the common terminal; a second resistive element of which one end is connected to the first supply terminal and another end is connected to the common terminal; a third resistive element of which one end is connected to one differential input terminal and another end is connected to the second supply terminal; a bonding wire, and a capacitor of which one end is connected to the second supply terminal and another end is connected to the common terminal.

Abstract: In an exemplary embodiment, a plurality of differential amplification circuits has: first differential amplification circuits each including a differential pair circuit to generate the differential signal according to the differential input signal, a delay line, and a current source to supply a current to the differential pair circuit via the delay line; and second differential amplification circuits each including a differential pair circuit to generate the differential signal according to the differential input signal, and a current source to directly supply a current to the differential pair circuit. The first differential amplification circuits and the second differential amplification circuits are mutually connected in parallel between the pair of input-side transmission lines and the pair of output-side transmission lines.

Abstract: The apparatus includes: an electric circuit including a first transmission line portion that propagates a second differential signal; a second amplifier that amplifies the second differential signal propagated through the first transmission line portion and outputs the amplified second differential signal as a third differential signal; a second transmission line portion that propagates the third differential signal; and an optical modulator including a first optical phase modulation portion that modulates a phase of an optical signal in response to the second differential signal propagating the first transmission line portion, an optical delay portion that delays the phase of the optical signal modulated, and a second optical phase modulation portion that modulates the phase of the optical signal delayed, in response to the third differential signal.

Abstract: An optical modulation device includes: a Mach-Zehnder modulator including a semiconductor waveguide; a plurality of phase modulators that are spaced from each other; a first amplifier that is coupled with an input transmission line transmitting an electrical signal, has an input impedance substantially equal to a characteristic impedance of the input transmission line; a first interconnection that is coupled to the first amplifier and transmits the electrical signal to a first end of one of the plurality of phase modulators that is provided on an input side of the Mach-Zehnder modulator; a second interconnection that is coupled to the first amplifier and transmits the electrical signal to a first end of the other of the plurality of phase modulators that is provided on an output side of the Mach-Zehnder modulator; and a plurality of termination resistors respectively coupled to second ends of the plurality of phase modulators.

Abstract: A level shift circuit lowers a voltage of a first differential signal by a second voltage value and outputs a lowered first differential signal as a second differential signal. A first differential circuit receives the first differential signal and outputs a third differential signal. A second emitter follower circuit receives the third differential signal at a base of a pair of second transistors. A second differential circuit receives the second differential signal at a base of a pair of third transistors. An output terminal is electrically connected to one of a first output node electrically connected to an emitter of the one of the second transistors and a collector of the one of the third transistors and a second output node electrically connected to an emitter of the another of the second transistors and a collector of the another of the third transistors and outputs a driving signal.