Patents by Inventor Tak Kwong (Dino) Wong

Tak Kwong (Dino) Wong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Minimizing timing skew among chip level outputs for registered output signals
    Patent number: 7292064
    Abstract: A synchronous output buffer circuit which effectively moves combinational logic associated with an output enable operation, boundary scan operation, and voltage translation to a pipe that leads into a pair of output registers that operate in response to the output clock signal. The output registers may be forced to asynchronously route an input signal to an output terminal during a reset mode and during a boundary scan mode. The output registers can include a safety circuit, which prevents pull-up and pull-down devices (which drive the output signal), from turning on at the same time.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: November 6, 2007
    Assignee: Integrated Device Technology, Inc.
    Inventor: Tak Kwong (Dino) Wong