Abstract: A Viterbi detector includes circuitry for receiving an NRZ encoded received signal in an EEPR4 channel to decode the signal according to &lgr;k(i)=(zk−yk(i))2−&agr;(i), wherein &agr;(i) is m &agr;, &agr; is a positive constant, m is a number of transitions within the most current four symbol periods, &lgr;k(i) is a branch metric at time k for an ith Viterbi branch, k is a time period, zk is a received value at time k, &lgr;k(i) is a metric used to determine a next state of the Viterbi based upon a maximum likelihood evaluation for an ith branch, ak, ak−1, ak−2, ak−3 are received state values at respective time periods k, k−1, k−2, and k−3, and yk is an ideal sample associated with an ith branch. The detector is operated to decode a received data value by determining whether the received value is in a space containing first (90) and second (92) possible decode values.

Abstract: A method and system for encoding user data bits for magnetic recording channels that produces a stationary trellis and that limits the burst error propagation to three user bytes. The input data bits are grouped into even bytes and odd bytes. The even bytes are encoded first into even codewords, then each of the odd bytes is encoded into odd codewords based on the even codeword for the even byte preceding each odd byte and on the even codeword for the even byte following each odd byte. The encoding eliminates the most common error events associated with Partial Response Maximum Likelihood channels by: (i) disallowing sequences of four consecutive ones in the codewords, (ii) allowing sequences of three consecutive ones to begin only on certain bit positions in certain codewords, (iii) allowing only certain beginning sequences and ending sequences for odd and even codewords in specific situations, and (iv) changing specific bits in the odd and even codewords based on disallowed codeword sequences.

Abstract: The present invention includes a fractional interpretation circuit to be used to correct pre-write compensation for writing data on a disk. The present invention need not be limited to a three phase interpreter but could easily be extended to a 4X or 5X. This could simply be implemented by adding additional current paths from the capacitors to ground in order to incrementally change the slew rate and consequently the phase interpretation.