Patents by Inventor Tak Sang Yeung

Tak Sang Yeung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150318230
    Abstract: Methods, systems, and apparatuses are described for cooling electronic devices. The electrical device includes an integrated circuit die (IC) having opposing first and second surfaces, a plurality of interconnects on the second surface of the IC die that enable the IC die to be coupled to a substrate, and a flexural plate wave device. The flexural plate wave device is configured to generate a stream of air to flow across the electrical device to cool the IC die during operation of the IC die.
    Type: Application
    Filed: July 16, 2015
    Publication date: November 5, 2015
    Inventors: Milind S. Bhagavat, Mehdi Saeidi, Tak Sang Yeung
  • Patent number: 9123698
    Abstract: Methods, systems, and apparatuses are described for cooling electronic devices. The electrical device includes an integrated circuit die (IC) having opposing first and second surfaces, a plurality of interconnects on the second surface of the IC die that enable the IC die to be coupled to a substrate, and a flexural plate wave device. The flexural plate wave device is configured to generate a stream of air to flow across the electrical device to cool the IC die during operation of the IC die.
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: September 1, 2015
    Assignee: Broadcom Corporation
    Inventors: Milind S. Bhagavat, Seyed Mahdi Saeidi, Tak Sang Yeung
  • Publication number: 20120050989
    Abstract: Methods, systems, and apparatuses are described for cooling electronic devices. The electrical device includes an integrated circuit die (IC) having opposing first and second surfaces, a plurality of interconnects on the second surface of the IC die that enable the IC die to be coupled to a substrate, and a flexural plate wave device. The flexural plate wave device is configured to generate a stream of air to flow across the electrical device to cool the IC die during operation of the IC die.
    Type: Application
    Filed: June 30, 2011
    Publication date: March 1, 2012
    Applicant: BROADCOM CORPORATION
    Inventors: Milind S. Bhagavat, Seyed Mahdi Saeidi, Tak Sang Yeung
  • Patent number: 7224048
    Abstract: A flip-chip ball grid array integrated circuit package with improved thermo-mechanical properties is provided. The package includes a substrate having first and second surfaces and a plurality of conductive traces therebetween. A semiconductor die is flip-chip mounted to the first surface of the substrate and electrically connected to ones of the conductive traces. An intermetallic heat spreader is fixed to a back side of the semiconductor die and a plurality of contact balls are disposed on the second surface of the substrate. The contact balls are in the form of a ball grid array and ones of the contact balls of the ball grid array are electrically connected to ones of the conductive traces.
    Type: Grant
    Filed: October 3, 2003
    Date of Patent: May 29, 2007
    Assignee: ASAT Ltd.
    Inventors: Neil McLellan, Tak Sang Yeung
  • Patent number: 6818472
    Abstract: An integrated circuit package including a substrate having opposing first and second surfaces. The substrate has conductive traces disposed therein. A semiconductor die is mounted on the first surface of the substrate and a silicon heat sink disposed on a portion of the semiconductor die. A plurality of wire bonds connect the semiconductor die to the conductive traces of the substrate and an overmold material covers the first surface of the substrate and a remainder of the semiconductor die. A ball grid array is disposed on the second surface of the substrate. Bumps of the ball grid array are in electrical connection with the conductive traces.
    Type: Grant
    Filed: February 24, 2003
    Date of Patent: November 16, 2004
    Assignee: Asat Ltd.
    Inventors: Chun Ho Fan, Joseph Andrew Martin, Ming Wang Sze, Tak Sang Yeung
  • Patent number: 6800948
    Abstract: An integrated circuit package including a substrate having opposing first and second surfaces. The substrate has conductive traces disposed therein. A semiconductor die is mounted on the first surface of the substrate and a silicon heat sink disposed on a portion of the semiconductor die. A plurality of wire bonds connect the semiconductor die to the conductive traces of the substrate and an overmold material covers the first surface of the substrate and a remainder of the semiconductor die. A ball grid array is disposed on the second surface of the substrate. Bumps of the ball grid array are in electrical connection with the conductive traces.
    Type: Grant
    Filed: July 19, 2002
    Date of Patent: October 5, 2004
    Assignee: ASAT Ltd.
    Inventors: Chun Ho Fan, Joseph Andrew Martin, Ming Wang Sze, Tak Sang Yeung
  • Patent number: 6667191
    Abstract: An integrated circuit package including a silicon wafer, a plate of intermetallic compound fixed to the back surface of the silicon wafer and a plurality of solder ball contacts. The solder ball contacts are in electrical connection with die circuitry on the front surface of the silicon wafer.
    Type: Grant
    Filed: August 5, 2002
    Date of Patent: December 23, 2003
    Assignee: Asat Ltd.
    Inventors: Neil McLellan, Wing Him Lau, Tak Sang Yeung, Onofre A. Rulloda, Jr.