Patents by Inventor Takaaki Hioka

Takaaki Hioka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10847710
    Abstract: The semiconductor device includes a vertical Hall element that is provided in a first region of a semiconductor substrate and has a plurality of first electrodes, and a resistive element that is provided in a second region different from the first region in the semiconductor substrate and has a plurality of second electrodes. The plurality of first electrodes and the plurality of second electrodes are connected so that resistances of current paths are substantially the same in any phase in which the vertical Hall element is driven using a spinning current method.
    Type: Grant
    Filed: March 25, 2019
    Date of Patent: November 24, 2020
    Assignee: ABLIC Inc.
    Inventors: Takaaki Hioka, Tomoki Hikichi
  • Publication number: 20200333820
    Abstract: A constant current circuit includes a depletion-type NMOS transistor having a drain connected to a constant current output terminal, and a resistance element provided between the depletion-type NMOS transistor and a ground terminal. The depletion-type NMOS transistor includes a first depletion-type NMOS transistor and a second depletion-type NMOS transistor which are connected in parallel and arranged to have current directions forming an angle of 90 degrees. The resistance element includes a first resistor and a second resistor which are arranged to have current directions forming an angle of 90 degrees.
    Type: Application
    Filed: April 2, 2020
    Publication date: October 22, 2020
    Inventors: Tomoki HIKICHI, Kentaro Fukai, Takaaki Hioka, Yohei Ogawa
  • Publication number: 20200249284
    Abstract: A semiconductor device includes a vertical Hall element provided in a first region of a semiconductor substrate, and having the first to the third electrodes arranged side by side in order along a first straight line; a circuit provided in a second region of the semiconductor substrate different from the first region, and having a heat source; and a second straight line intersecting orthogonally a current path for a Hall element drive current which flows between the first electrode and the third electrode. The second line passes a center of the vertical Hall element, and a center point of a region which reaches the highest temperature in the circuit during an operation of the vertical Hall element lies on the second straight line.
    Type: Application
    Filed: January 23, 2020
    Publication date: August 6, 2020
    Inventors: Takaaki HIOKA, Tomoki HIKICHI
  • Publication number: 20200152861
    Abstract: A semiconductor devices has a vertical Hall element formed on a semiconductor substrate, the vertical Hall element including a semiconductor layer of a second conductivity type formed above the semiconductor substrate; an impurity diffusion layer of the second conductivity type formed in an upper portion of the semiconductor layer and having a concentration higher than that of the semiconductor layer; a plurality of electrodes formed on a surface of the impurity diffusion layer, arrayed in a straight line, and each formed from an impurity region of the second conductivity type; a plurality of electrode isolation diffusion layers of the first conductivity type each formed between two adjacent electrodes; and a buried layer formed between the semiconductor substrate and the semiconductor layer, and having a concentration higher than that of the semiconductor layer and lower than that of the impurity diffusion layer.
    Type: Application
    Filed: October 25, 2019
    Publication date: May 14, 2020
    Inventor: Takaaki HIOKA
  • Patent number: 10615333
    Abstract: The vertical Hall element includes: a semiconductor layer of a second conductivity type formed on a semiconductor substrate of a first conductivity type; a first electrode set formed in a surface of the semiconductor layer and including a first drive current supply electrode, a Hall voltage output electrode, and a second drive current supply electrode aligned along a straight line extending in a first direction in this order; and second to fifth electrode sets each having the same configuration as the configuration of the first electrode set and aligned with the first electrode set along a straight line extending in a second direction perpendicular to the first direction. The Hall voltage output electrode has a first depth, the first and second drive current supply electrodes have a second depth that is larger than the first depth.
    Type: Grant
    Filed: February 21, 2018
    Date of Patent: April 7, 2020
    Assignee: ABLIC INC.
    Inventor: Takaaki Hioka
  • Publication number: 20200011942
    Abstract: A semiconductor device includes a semiconductor substrate 10 of a first conductivity type, a vertical Hall element 100 provided on the semiconductor substrate 10, and an excitation conductor 200 provided directly above the vertical Hall element 100 with an intermediation of an insulating film 30. The vertical Hall element 100 includes a semiconductor layer 101 of a second conductivity type provided on the semiconductor substrate 10, and a plurality of electrodes 111 through 115 each constituted from a high-concentration second conductivity type impurity region and provided on the surface of the semiconductor layer 101 along a straight line. A ratio WC/WH between a width WC of the excitation conductor 200 and a width WH of each of the plurality of electrodes 111 through 115 satisfies 0.3?WC/WH?1.0.
    Type: Application
    Filed: June 18, 2019
    Publication date: January 9, 2020
    Inventors: Takaaki HIOKA, Hirotaka UEMURA
  • Patent number: 10504957
    Abstract: A semiconductor device includes a semiconductor substrate having a plurality of Hall elements formed therein, and a magnetic body formed on the semiconductor substrate and having a magnetic flux converging function. The contour in a vertical cross section of the magnetic body on the semiconductor substrate has an outer circumferential portion. At least a part of the outer circumferential portion has a curve-shaped portion and a portion substantially parallel to the semiconductor substrate. A gap is formed between the semiconductor substrate and the portion of the magnetic body that is substantially parallel to the semiconductor substrate, and the gap lies above the entire top surfaces of the Hall elements. The magnetic body has at least a part of a structure made of non-magnetic substance embedded therein.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: December 10, 2019
    Assignee: ABLIC Inc.
    Inventors: Matsuo Kishi, Miei Takahama (nee Sato), Hiroshi Takahashi, Mika Ebihara, Takaaki Hioka
  • Publication number: 20190355899
    Abstract: A Hall element includes a magnetic sensing portion formed of an impurity diffusion layer of a second conductivity type, and having four ends, and four electrodes provided at the respective four ends. The impurity diffusion layer forming the magnetic sensing portion has a first depth from a surface of the semiconductor substrate, has a first concentration gradient in which a concentration of impurities of the second conductivity type increases in a depth direction from the surface of the semiconductor substrate to a second depth which is shallower than the first depth, and has a second concentration gradient in which the concentration of the impurities of the second conductivity type decreases in the depth direction from the second depth to the first depth. The second depth is half the first depth or less, and the first concentration gradient is steeper than the second concentration gradient.
    Type: Application
    Filed: May 15, 2019
    Publication date: November 21, 2019
    Inventor: Takaaki Hioka
  • Publication number: 20190326507
    Abstract: A semiconductor device includes a first and a second vertical Hall elements formed parallel to each other. Each of the first and the second vertical Hall elements includes: a semiconductor layer on the semiconductor substrate; a Hall voltage output electrode and a first and a second drive current supply electrodes each formed of an impurity region, and sequentially arranged along a straight line on the semiconductor layer; and a first electrode isolation diffusion layer between the first drive current supply electrode and the Hall voltage output electrode, and a second electrode isolation diffusion layer between the Hall voltage output electrode and the second drive current supply electrode. The first and the second drive current supply electrodes each has the second depth deeper than the first depth of the Hall voltage output electrode and the depth of each of the electrode isolation diffusion layers.
    Type: Application
    Filed: April 22, 2019
    Publication date: October 24, 2019
    Inventor: Takaaki HIOKA
  • Patent number: 10429453
    Abstract: The magnetic sensor includes a semiconductor substrate having Hall elements on a front surface of the semiconductor substrate, an adhesive layer formed on a back surface of the semiconductor substrate, and a magnetic flux converging plate formed on the adhesive layer. The magnetic flux converging plate is formed on the back surface of the semiconductor substrate through formation of the magnetic flux converging plate by electroplating on a base conductive layer formed on a plating substrate prepared separately from the semiconductor substrate, application of an adhesive for forming the adhesive layer onto a surface of the magnetic flux converging plate so that the magnetic flux converging plate adheres to the back surface of the semiconductor substrate, and peeling off of the plating substrate afterward from the base conductive layer formed on the magnetic flux converging plate.
    Type: Grant
    Filed: March 14, 2017
    Date of Patent: October 1, 2019
    Assignee: ABLIC INC.
    Inventors: Takaaki Hioka, Mika Ebihara, Hiroshi Takahashi, Matsuo Kishi, Miei Takahama
  • Publication number: 20190296227
    Abstract: The semiconductor device includes a vertical Hall element that is provided in a first region of a semiconductor substrate and has a plurality of first electrodes, and a resistive element that is provided in a second region different from the first region in the semiconductor substrate and has a plurality of second electrodes. The plurality of first electrodes and the plurality of second electrodes are connected so that resistances of current paths are substantially the same in any phase in which the vertical Hall element is driven using a spinning current method.
    Type: Application
    Filed: March 25, 2019
    Publication date: September 26, 2019
    Applicant: ABLIC Inc.
    Inventors: Takaaki HIOKA, Tomoki HIKICHI
  • Publication number: 20190285708
    Abstract: The semiconductor device includes a first vertical Hall element provided in a first region of a semiconductor substrate, and including a first plurality of electrodes arranged at predetermined intervals on a first straight line, a second vertical Hall element provided in a second region of the semiconductor substrate different from the first region, and including a second plurality of electrodes of the same number as that of the first plurality of electrodes, the second plurality of electrodes being arranged at the predetermined intervals on a second straight line parallel to the first straight line, a first drive power source configured to drive the first vertical Hall element, and a second drive power source configured to drive the second vertical Hall element and provided separately from the first drive power source.
    Type: Application
    Filed: March 11, 2019
    Publication date: September 19, 2019
    Inventors: Takaaki Hioka, Tomoki Hikichi
  • Patent number: 10290677
    Abstract: A semiconductor device includes a semiconductor substrate having a plurality of Hall elements formed therein, and a magnetic body formed on the semiconductor substrate and having a magnetic flux converging function. The contour in vertical cross-section of the magnetic body on the semiconductor substrate has an outer circumferential portion. At least a part of the outer circumferential portion has a portion having an approximate quadrant shape, and a portion contiguous to the approximate quadrant portion and substantially parallel to the semiconductor substrate.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: May 14, 2019
    Assignee: ABLIC Inc.
    Inventors: Matsuo Kishi, Miei Takahama (nee Sato), Hiroshi Takahashi, Mika Ebihara, Takaaki Hioka
  • Patent number: 10263177
    Abstract: The vertical Hall element includes: a second conductivity type semiconductor layer formed on a first conductivity type semiconductor substrate; a plurality of high-concentration second conductivity type electrodes formed in a straight line on a surface of the semiconductor layer having substantially the same shape, and spaced at a first interval; a plurality of electrode isolation layers each formed between two electrodes out of the plurality of electrodes to isolate the plurality of electrodes from one another having substantially the same shape, and spaced at a second interval; and a first added layer and a second added layer each formed along the straight line outside of the outermost electrodes, and each having substantially the same structure as that of each electrode isolation layer.
    Type: Grant
    Filed: November 16, 2017
    Date of Patent: April 16, 2019
    Assignee: ABLIC INC.
    Inventors: Takaaki Hioka, Mika Ebihara
  • Patent number: 10263176
    Abstract: A vertical Hall element having an improved sensitivity and reduced offset voltage includes: a second conductivity type semiconductor layer formed on a semiconductor substrate and having an impurity concentration that is distributed uniformly; a second conductivity type impurity diffusion layer formed on the semiconductor layer and having a concentration higher than in the semiconductor layer; a plurality of electrodes formed in a straight line on a surface of the impurity diffusion layer, and each formed from a second conductivity type impurity region that is higher in concentration than the impurity diffusion layer; and a plurality of first conductivity type electrode isolation diffusion layers each formed between two electrodes out of the plurality of electrodes on the surface of the impurity diffusion layer, to isolate the plurality of electrodes from one another.
    Type: Grant
    Filed: November 9, 2017
    Date of Patent: April 16, 2019
    Assignee: ABLIC INC.
    Inventors: Takaaki Hioka, Mika Ebihara
  • Patent number: 10236440
    Abstract: The vertical Hall element includes: a second conductivity type semiconductor layer; electrodes aligned along a straight line in a surface of the semiconductor layer, and each include a second conductivity type impurity region that is higher in concentration than semiconductor layer; and first conductivity type electrode isolation diffusion layers isolating the electrodes from one another, each of the electrode isolation diffusion layers being provided between each pair of the electrodes in the surface of the semiconductor layer, the electrodes including an electrode that functions as a drive current supply electrode and an electrode that functions as a Hall voltage output electrode, the drive current supply electrode and the Hall voltage output electrode being arranged alternately, the Hall voltage output electrode having a first depth, the drive current supply electrode having a second depth that is larger than the first depth and a depth of the electrode isolation diffusion layers.
    Type: Grant
    Filed: February 21, 2018
    Date of Patent: March 19, 2019
    Assignee: ABLIC INC.
    Inventor: Takaaki Hioka
  • Publication number: 20180315919
    Abstract: Provided is a semiconductor device including a Hall element, in which a depletion layer is prevented from spreading to a magnetism sensing portion more reliably, and thus variations in characteristic are reduced. The semiconductor device, including: a semiconductor substrate of a first conductivity type; and a Hall element formed on the semiconductor substrate, the Hall element having: a magnetism sensing portion of a second conductivity type formed on the semiconductor substrate so as to be separated from the semiconductor substrate; and a semiconductor layer of the second conductivity type formed so as to surround side surfaces and a bottom surface of the magnetism sensing portion on the semiconductor substrate and has a lower concentration than a concentration of the magnetism sensing portion and a uniform concentration distribution.
    Type: Application
    Filed: April 27, 2018
    Publication date: November 1, 2018
    Inventors: Yohei OGAWA, Takaaki HIOKA
  • Publication number: 20180254408
    Abstract: The vertical Hall element includes: a second conductivity type semiconductor layer; electrodes aligned along a straight line in a surface of the semiconductor layer, and each include a second conductivity type impurity region that is higher in concentration than semiconductor layer; and first conductivity type electrode isolation diffusion layers isolating the electrodes from one another, each of the electrode isolation diffusion layers being provided between each pair of the electrodes in the surface of the semiconductor layer, the electrodes including an electrode that functions as a drive current supply electrode and an electrode that functions as a Hall voltage output electrode, the drive current supply electrode and the Hall voltage output electrode being arranged alternately, the Hall voltage output electrode having a first depth, the drive current supply electrode having a second depth that is larger than the first depth and a depth of the electrode isolation diffusion layers.
    Type: Application
    Filed: February 21, 2018
    Publication date: September 6, 2018
    Inventor: Takaaki HIOKA
  • Publication number: 20180254407
    Abstract: The vertical Hall element includes: a semiconductor layer of a second conductivity type formed on a semiconductor substrate of a first conductivity type; a first electrode set formed in a surface of the semiconductor layer and including a first drive current supply electrode, a Hall voltage output electrode, and a second drive current supply electrode aligned along a straight line extending in a first direction in this order; and second to fifth electrode sets each having the same configuration as the configuration of the first electrode set and aligned with the first electrode set along a straight line extending in a second direction perpendicular to the first direction. The Hall voltage output electrode has a first depth, the first and second drive current supply electrodes have a second depth that is larger than the first depth.
    Type: Application
    Filed: February 21, 2018
    Publication date: September 6, 2018
    Inventor: Takaaki HIOKA
  • Patent number: 10060991
    Abstract: Provided is a semiconductor device including a vertical Hall element with improved sensitivity. The vertical Hall element includes: a semiconductor layer of a second conductivity type formed on the semiconductor substrate; a plurality of electrodes aligned along a straight line on a surface of the semiconductor layer and being impurity regions of the second conductivity type being higher in concentration than the semiconductor layer; a plurality of electrode isolation diffusion layers of the first conductivity type respectively arranged between adjacent electrodes of the plurality of electrodes on the surface of the semiconductor layer to isolate the plurality of electrodes from one another; and embedded layers being an impurity region of the second conductivity type which is higher in concentration than the semiconductor layer and being respectively provided substantially right below one of the plurality of electrode isolation diffusion layers between the semiconductor substrate and the semiconductor layer.
    Type: Grant
    Filed: November 16, 2017
    Date of Patent: August 28, 2018
    Assignee: ABLIC INC.
    Inventors: Takaaki Hioka, Mika Ebihara