Patents by Inventor Takaaki Sugiyama

Takaaki Sugiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11965315
    Abstract: The invention of the present application intends to provide a work machine that can ensure high operability by preventing abrupt actuation of an actuator and a shock to a machine body by use of a bleed-off function at the time of starting of the actuator and that can improve the energy-saving performance by reducing a bleed-off flow rate after the starting of the actuator. For this purpose, a controller opens a bleed-off valve at a timing at which an operation device is being operated and before a flow rate of a hydraulic pump starts increasing, and closes the bleed-off valve at a timing at which the operation device is being operated and after the flow rate of the hydraulic pump has started increasing.
    Type: Grant
    Filed: December 8, 2021
    Date of Patent: April 23, 2024
    Assignee: Hitachi Construction Machinery Co., Ltd.
    Inventors: Kento Kumagai, Shinya Imura, Yasutaka Tsuruga, Takaaki Chiba, Hiroaki Amano, Shinji Nishikawa, Akihiro Narazaki, Genroku Sugiyama, Shinjiro Yamamoto
  • Patent number: 11927923
    Abstract: A management apparatus in a time synchronization system includes a time variation information receiving unit configured to acquire time variation information and position information of a time synchronization apparatus, a position information classifying unit configured to classify time synchronization apparatuses into predetermined categories based on the acquired position information, a time variation analysis configured to determine majority based on whether patterns of time variation of the time synchronization apparatuses belonging to an identical category are identical to each other, and to analyze the time variation based on the determined results, and a filtering and delivery unit configured to output an instruction to block the time information received from the positioning satellite, to the time synchronization apparatus having abnormal time variation.
    Type: Grant
    Filed: March 5, 2019
    Date of Patent: March 12, 2024
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Takaaki Hisashima, Hiroki Sakuma, Kaoru Arai, Ryuta Sugiyama, Shunichi Tsuboi, Osamu Kurokawa, Kazuyuki Matsumura
  • Patent number: 11651720
    Abstract: A display device of the present disclosure is provided with a pixel circuit that includes a light-emitting element; a current modulator that controls a current value flowing through the light-emitting element; a current breaker that interrupts a current flowing through the light-emitting element; and a gray-scale controller that controls the current modulator and the current breaker to perform gray-scale control. The gray-scale controller discretely controls a light emission duty of the light-emitting element through the current breaker, and controls, through the current modulator, the current value flowing through the light-emitting element in accordance with the light emission duty of the light-emitting element.
    Type: Grant
    Filed: April 7, 2020
    Date of Patent: May 16, 2023
    Assignee: SONY GROUP CORPORATION
    Inventors: Ken Kikuchi, Takaaki Sugiyama
  • Publication number: 20220208066
    Abstract: A display device of the present disclosure is provided with a pixel circuit that includes a light-emitting element; a current modulator that controls a current value flowing through the light-emitting element; a current breaker that interrupts a current flowing through the light-emitting element; and a gray-scale controller that controls the current modulator and the current breaker to perform gray-scale control. The gray-scale controller discretely controls a light emission duty of the light-emitting element through the current breaker, and controls, through the current modulator, the current value flowing through the light-emitting element in accordance with the light emission duty of the light-emitting element.
    Type: Application
    Filed: April 7, 2020
    Publication date: June 30, 2022
    Applicant: SONY GROUP CORPORATION
    Inventors: Ken KIKUCHI, Takaaki SUGIYAMA
  • Publication number: 20220196421
    Abstract: A navigation system provides advice to a driver of a battery electric vehicle regarding charging a battery mounted in the battery electric vehicle. The navigation system includes an input device, a storage medium, a measurement device, and a controller. The input device is configured to receive an input of a normal state during driving in advance by the driver. The normal state during driving is recognized by the driver. The storage medium is configured to store the normal state received by the input device. The measurement device is configured to measure a current state during driving. The controller is configured to calculate a difference between the normal state stored and the current state measured, and set the advice according to the difference to provide the driver.
    Type: Application
    Filed: March 15, 2022
    Publication date: June 23, 2022
    Inventors: Yoshinori KAWABATA, Chihiro HIRANO, Toshihiro SHINTAI, Masahiko KAWAMOTO, Takaaki SUGIYAMA
  • Patent number: 11328655
    Abstract: A display apparatus according to an embodiment of the present disclosure includes: a display panel including a plurality of pixels; and a drive device that outputs a driving signal to the display panel. The driving signal causes one of the pixels to emit light many times by an active PWM drive method in a 1-frame period.
    Type: Grant
    Filed: March 6, 2018
    Date of Patent: May 10, 2022
    Assignees: Sony Semiconductor Solutions Corporation, Sony Corporation
    Inventors: Takaaki Sugiyama, Ken Kikuchi, Atsushi Yasuda, Hirokazu Imai, Hiroshi Tobita
  • Patent number: 11200834
    Abstract: A display apparatus includes pixels arranged in a two-dimensional matrix pattern, each of which including a light-emitting unit and a drive circuit that drives the unit and includes a comparator circuit that compares a control pulse with potential based on signal voltage and outputs predetermined voltage based on the result, a transistor driving the unit in response to the predetermined voltage, and a current source that supplies current to the unit during driving of the transistor, includes a current-source transistor, a capacity unit connected to a gate electrode of the current-source transistor, a differential amplifier that detects a differential between voltage based on reference constant current and reference voltage, and a transistor controlling the voltage based on reference constant current depending on current flowing through the current-source transistor, and controls gate potential of the current-source transistor on the basis of output of the amplifier in synchronization with a scanning signal.
    Type: Grant
    Filed: August 5, 2015
    Date of Patent: December 14, 2021
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Ken Kikuchi, Takaaki Sugiyama, Takehiro Misonou, Genichiro Oga, Takahiro Kita
  • Publication number: 20210295766
    Abstract: A display apparatus according to an embodiment of the present disclosure includes: a display panel including a plurality of pixels; and a drive device that outputs a driving signal to the display panel. The driving signal causes one of the pixels to emit light many times by an active PWM drive method in a 1-frame period.
    Type: Application
    Filed: March 6, 2018
    Publication date: September 23, 2021
    Applicants: Sony Semiconductor Solutions Corporation, Sony Corporation
    Inventors: Takaaki Sugiyama, Ken Kikuchi, Atsushi Yasuda, Hirokazu Imai, Hiroshi Tobita
  • Publication number: 20210229677
    Abstract: A disturbance degree calculation system includes a sensor that acquires data on a factor that hinders safe driving of a driver, and a disturbance degree calculation unit that calculates a disturbance degree indicating a degree of disturbance to the driver's safe driving based on the factor hindering the safe driving of the driver.
    Type: Application
    Filed: April 15, 2021
    Publication date: July 29, 2021
    Inventors: Takaaki SUGIYAMA, Masahiko KAWAMOTO, Yoshinori KAWABATA, Toshihiro SHINTAI, Akemi KOGA, Masaru SAWAKI
  • Patent number: 10615786
    Abstract: A comparator circuit according to the present disclosure includes a first switch section that selectively takes in a signal voltage, a second switch section that selectively takes in a control waveform, a differential amplifier including a non-inverted input end connected to each of output ends of the first switch section and the second switch section, a capacity section including one end connected to an inverted input end of the differential amplifier and the other end supplied with a reference voltage, and a third switch section that selectively short-circuits the inverted input end and an output end of the differential amplifier.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: April 7, 2020
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Takaaki Sugiyama, Masaki Yoshioka, Ken Kikuchi, Masaru Chibashi, Ken Kitamura
  • Patent number: 10515709
    Abstract: A sample-and-hold circuit of the disclosure includes: a differential pair that includes a first MOS transistor and a second MOS transistor, in which respective source terminals of the first MOS transistor and the second MOS transistor are interconnected to a specified node, and an input signal is input to a gate terminal of the first MOS transistor; a capacitor that is coupled to a gate terminal of the second MOS transistor, and samples and holds the input signal; a switch transistor that has a source terminal coupled to the capacitor and the gate terminal of the second MOS transistor, and causes the capacitor to sample and hold the input signal upon application of a predetermined ON voltage; and an ON-voltage control transistor that couples a gate terminal of the switch transistor to the specified node when causing the input signal to be sampled and held.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: December 24, 2019
    Assignee: SONY CORPORATION
    Inventors: Masaru Chibashi, Ken Kikuchi, Takaaki Sugiyama
  • Publication number: 20190123730
    Abstract: A comparator circuit according to the present disclosure includes: a first switch section that selectively takes in a signal voltage; a second switch section that selectively takes in a control waveform; a differential amplifier including a non-inverted input end connected to each of output ends of the first switch section and the second switch section; a capacity section including one end connected to an inverted input end of the differential amplifier and the other end supplied with a reference voltage; and a third switch section that selectively short-circuits the inverted input end and an output end of the differential amplifier.
    Type: Application
    Filed: December 21, 2018
    Publication date: April 25, 2019
    Inventors: TAKAAKI SUGIYAMA, MASAKI YOSHIOKA, KEN KIKUCHI, MASARU CHIBASHI, KEN KITAMURA
  • Patent number: 10255852
    Abstract: A comparator unit includes: a comparison section configured to compare a control pulse with an electric potential based on a signal voltage; and a control section configured to control, based on the control pulse, operation and non-operation of the comparison section.
    Type: Grant
    Filed: June 5, 2017
    Date of Patent: April 9, 2019
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Ken Kikuchi, Takaaki Sugiyama, Takehiro Misonou, Genichiro Oga, Takahiro Kita
  • Patent number: 10187048
    Abstract: A comparator circuit according to the present disclosure includes: a first switch section that selectively takes in a signal voltage; a second switch section that selectively takes in a control waveform; a differential amplifier including a non-inverted input end connected to each of output ends of the first switch section and the second switch section; a capacity section including one end connected to an inverted input end of the differential amplifier and the other end supplied with a reference voltage; and a third switch section that selectively short-circuits the inverted input end and an output end of the differential amplifier.
    Type: Grant
    Filed: May 28, 2014
    Date of Patent: January 22, 2019
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Takaaki Sugiyama, Masaki Yoshioka, Ken Kikuchi, Masaru Chibashi, Ken Kitamura
  • Publication number: 20180330797
    Abstract: A sample-and-hold circuit of the disclosure includes: a differential pair that includes a first MOS transistor and a second MOS transistor, in which respective source terminals of the first MOS transistor and the second MOS transistor are interconnected to a specified node, and an input signal is input to a gate terminal of the first MOS transistor; a capacitor that is coupled to a gate terminal of the second MOS transistor, and samples and holds the input signal; a switch transistor that has a source terminal coupled to the capacitor and the gate terminal of the second MOS transistor, and causes the capacitor to sample and hold the input signal upon application of a predetermined ON voltage; and an ON-voltage control transistor that couples a gate terminal of the switch transistor to the specified node when causing the input signal to be sampled and held.
    Type: Application
    Filed: October 31, 2016
    Publication date: November 15, 2018
    Inventors: MASARU CHIBASHI, KEN KIKUCHI, TAKAAKI SUGIYAMA
  • Patent number: 10002565
    Abstract: A display unit includes a pixel group having pixels. Each of the pixels includes a light emitting section and a drive circuit. The pixel group is divided into P pieces of pixel blocks. The display unit is configured to allow the light emitting sections from the light emitting sections configuring the respective pixels in a first pixel block of the P pieces of pixel blocks to the light emitting sections configuring the respective pixels in a P-th pixel block of the P pieces of pixel blocks to sequentially emit light together on a pixel block basis, and when the light emitting sections configuring the respective pixels in pixel blocks of the P pieces of pixel blocks emit light, configured to allow the light emitting sections configuring the respective pixels in remaining pixel blocks of the P pieces of pixel blocks not to emit light.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: June 19, 2018
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Ken Kikuchi, Takehiro Misonou, Genichiro Oga, Takahiro Kita, Takaaki Sugiyama, Eiji Nagasaka, Kenji Watanabe, Takayuki Kubota
  • Patent number: 9906212
    Abstract: A comparator circuit includes a differential circuit unit which detects a difference between two input signals, a current supply unit which supplies a current to the differential circuit unit, and a control unit which detects an operation timing of the differential circuit unit and controls the current supplied to the differential circuit unit by the current supply unit according to a detection result thereof.
    Type: Grant
    Filed: February 22, 2017
    Date of Patent: February 27, 2018
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Takaaki Sugiyama, Ken Kitamura, Masaki Yoshioka, Ken Kikuchi
  • Publication number: 20170270858
    Abstract: A comparator unit includes: a comparison section configured to compare a control pulse with an electric potential based on a signal voltage; and a control section configured to control, based on the control pulse, operation and non-operation of the comparison section.
    Type: Application
    Filed: June 5, 2017
    Publication date: September 21, 2017
    Inventors: Ken Kikuchi, Takaaki Sugiyama, Takehiro Misonou, Genichiro Oga, Takahiro Kita
  • Patent number: 9697766
    Abstract: A comparator unit includes: a comparison section configured to compare a control pulse with an electric potential based on a signal voltage; and a control section configured to control, based on the control pulse, operation and non-operation of the comparison section.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: July 4, 2017
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Ken Kikuchi, Takaaki Sugiyama, Takehiro Misonou, Genichiro Oga, Takahiro Kita
  • Publication number: 20170163253
    Abstract: A comparator circuit includes a differential circuit unit which detects a difference between two input signals, a current supply unit which supplies a current to the differential circuit unit, and a control unit which detects an operation timing of the differential circuit unit and controls the current supplied to the differential circuit unit by the current supply unit according to a detection result thereof.
    Type: Application
    Filed: February 22, 2017
    Publication date: June 8, 2017
    Applicant: Sony Semiconductor Solutions Corporation
    Inventors: Takaaki Sugiyama, Ken Kitamura, Masaki Yoshioka, Ken Kikuchi