Abstract: A PLL frequency synthesizer comprises a voltage controlled oscillator which oscillates in response to a frequency signal corresponding to a control signal to be input and which outputs the frequency signal as an output of said PLL frequency synthesizer; a multiplier means for multiplying a reference frequency signal to be input; a mixer for mixing the frequency signal which is output from the voltage controlled oscillator and the multiplied reference frequency signal which is output from the multiplier, and for outputting a frequency signal representative of a difference therebetween; a variable frequency divider for dividing the difference frequency signal at a variable dividing ratio; a fixed frequency divider for dividing the reference frequency signal at a predetermined dividing ratio; a frequency phase comparator for detecting a phase difference between an output signal from the variable frequency divider and an output signal from the fixed frequency divider and for outputting a phase difference signal t