Patents by Inventor Takafumi Nasu

Takafumi Nasu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190173175
    Abstract: A magnetic field coupling element includes conductor patterns stacked with insulating layers interposed therebetween, and interlayer connection conductors that inter-connect the conductor patterns at predetermined positions. The conductor patterns include first, second, third, and fourth conductor patterns, and the interlayer connection conductors include first and second interlayer connection conductors. The first conductor pattern, the second conductor pattern, and the first interlayer connection conductor define a first coil, and the third conductor pattern, the fourth conductor pattern, and the second interlayer connection conductor define a second coil. The first coil and the second coil are disposed in a region of less than about 1/3 of a stacking height of a multi-layer body including the insulating layers.
    Type: Application
    Filed: February 7, 2019
    Publication date: June 6, 2019
    Inventors: Kentaro MIKAWA, Kenichi ISHIZUKA, Takafumi NASU
  • Publication number: 20190075648
    Abstract: A wireless module includes a substrate that includes a first portion, a second portion, and a first flexible portion connecting the first portion and the second portion to each other. The first portion includes a circuit element that is mounted on the first main surface and a circuit including at least the circuit element. The second portion includes a first coil connected to the circuit. The first portion and the second portion face each other. A magnetic sheet is disposed on a second main surface of the second portion, and a battery is disposed between the second main surface of the first portion and the magnetic layer.
    Type: Application
    Filed: November 7, 2018
    Publication date: March 7, 2019
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Takafumi NASU, Tatsuya HOSOTANI, Katsumi TANIGUCHI, Makoto TAKEOKA, Masaaki KANAO
  • Patent number: 9673769
    Abstract: A variable gain transconductance amplifier includes an amplifier transistor connected to an input node, a cascode transistor having a source connected to a drain of the amplifier transistor and having a drain connected to an output node, and a switching circuit connecting or disconnecting a node to which the amplifier transistor and the cascode transistor are connected to or from a fixed potential in a switchable manner. A variable gain circuit may include the variable gain transconductance amplifier.
    Type: Grant
    Filed: February 3, 2016
    Date of Patent: June 6, 2017
    Assignee: SOCIONEXT INC.
    Inventors: Takafumi Nasu, Shinichiro Uemura
  • Patent number: 9564858
    Abstract: A parallel resonant circuit with excellent distortion and saturation characteristics is provided at low power consumption. A first power-supply voltage is applied to the parallel resonant circuit. In the parallel resonant circuit, a variable resistor includes one or more parallel-connected branches. Each of the branches includes a series circuit of a resistor and a MOS switch. A second power supply supplies power of control signals applied to respective gates of the MOS switches, and supplies back gate voltages to the MOS switches. A power-supply voltage of the second power supply is higher than the first power-supply voltage.
    Type: Grant
    Filed: February 5, 2016
    Date of Patent: February 7, 2017
    Assignee: SOCIONEXT INC.
    Inventors: Takafumi Nasu, Shinichiro Uemura, Atsushi Ohara
  • Publication number: 20160156323
    Abstract: A variable gain transconductance amplifier includes an amplifier transistor connected to an input node, a cascode transistor having a source connected to a drain of the amplifier transistor and having a drain connected to an output node, and a switching circuit connecting or disconnecting a node to which the amplifier transistor and the cascode transistor are connected to or from a fixed potential in a switchable manner. A variable gain circuit may include the variable gain transconductance amplifier.
    Type: Application
    Filed: February 3, 2016
    Publication date: June 2, 2016
    Inventors: Takafumi NASU, Shinichiro UEMURA
  • Publication number: 20160156315
    Abstract: A parallel resonant circuit with excellent distortion and saturation characteristics is provided at low power consumption. A first power-supply voltage is applied to the parallel resonant circuit. In the parallel resonant circuit, a variable resistor includes one or more parallel-connected branches. Each of the branches includes a series circuit of a resistor and a MOS switch. A second power supply supplies power of control signals applied to respective gates of the MOS switches, and supplies back gate voltages to the MOS switches. A power-supply voltage of the second power supply is higher than the first power-supply voltage.
    Type: Application
    Filed: February 5, 2016
    Publication date: June 2, 2016
    Inventors: Takafumi NASU, Shinichiro UEMURA, Atsushi OHARA
  • Patent number: 8483643
    Abstract: Disclosed is a harmonic rejection mixer that makes it possible to suppress high-frequency response, while keeping the number of gm elements from increasing. In a harmonic rejection mixer that regulates the waveform of an output signal by mixing outputs of multiple mixers that are connected in parallel with the latter stage of multiple gm elements, some of the gm elements are shared by I phase and Q phase by using a control signal with a duty ratio of less than 50% to drive at least some of the mixers, and then using the period in which the I-phase mixers are inactive to activate the Q-phase mixers.
    Type: Grant
    Filed: January 29, 2010
    Date of Patent: July 9, 2013
    Assignee: Panasonic Corporation
    Inventors: Yoshito Shimizu, Noriaki Saito, Kiyomichi Araki, Takafumi Nasu
  • Publication number: 20120139633
    Abstract: A presented semiconductor integrated circuit, which processes an RF signal, achieves preferable distortion characteristics even at the low supply voltage. It includes an attenuator configured to attenuate an input signal with a variable attenuation, a source follower configured to receive an output of the attenuator, and an amplifying unit configured to perform a filtering process on an output of the source follower, and then amplify the output of the source follower with a variable gain.
    Type: Application
    Filed: February 16, 2012
    Publication date: June 7, 2012
    Applicant: Panasonic Corporation
    Inventors: Takafumi Nasu, George Hayashi, Katsumasa Hijikata
  • Publication number: 20120049926
    Abstract: Disclosed is a harmonic rejection mixer that makes it possible to suppress high-frequency response, while keeping the number of gm elements from increasing. In a harmonic rejection mixer that regulates the waveform of an output signal by mixing outputs of multiple mixers that are connected in parallel with the latter stage of multiple gm elements, some of the gm elements are shared by I phase and Q phase by using a control signal with a duty ratio of less than 50% to drive at least some of the mixers, and then using the period in which the I-phase mixers are inactive to activate the Q-phase mixers.
    Type: Application
    Filed: January 29, 2010
    Publication date: March 1, 2012
    Applicant: PANASONIC CORPORATION
    Inventors: Yoshito Shimizu, Noriaki Saito, Kiyomichi Araki, Takafumi Nasu