Abstract: An A/D converter which converts an analog current signal into a digital signal, includes: a filter removing a noise component from the analog current signal to output an analog voltage signal; a quantizer quantizing the analog voltage signal outputted from the filter to generate the digital signal; and a D/A converter converting the digital signal generated by the quantizer into an analog feedback current to feedback to an input of the filter, and supplying a bias current for the D/A converter to an output of a frequency converter via a path of the analog current signal as a bias current driving the frequency converter outputting the analog current signal.

Abstract: A variable resolution analog-to-digital converter includes a sample-and-hold circuit including a plurality of sample-and-hold units which are connected in parallel and selectively activated corresponding to a required resolution to sample and hold an analog input signal, a plurality of conversion stages connected in cascade to an output of the sample-and-hold circuit to convert an output signal of the sample-and-hold circuit to a plurality of bit signals, and a synthesis circuit to synthesize the bit signals, to generate a digital output signal.

Abstract: According to an embodiment of the invention, there is provided a digital/analog converter includes: a decoder that converts a (n?1)-phase input digital signal to a n-phase output digital signal; and a signal generating unit that generates analog signals according to the n-phase output digital signal.

Abstract: A variable resolution analog-to-digital converter includes a sample-and-hold circuit including a plurality of sample-and-hold units which are connected in parallel and selectively activated corresponding to a required resolution to sample and hold an analog input signal, a plurality of conversion stages connected in cascade to an output of the sample-and-hold circuit to convert an output signal of the sample-and-hold circuit to a plurality of bit signals, and a synthesis circuit to synthesize the bit signals, to generate a digital output signal.

Abstract: Disclosed is an AD converter including: a first conversion stage including a quantizing part to generate m parallel pieces of quantized signals from m pieces of input analog signals representing n-dimensional vectors (n<m<2n), a decoding part to generate m pieces of decoded analog signals from the m parallel pieces of quantized signals, and a residual amplifying part to output m pieces of amplified residual signals by multiplying respective differences between each of the m pieces of analog signals and each of the m pieces of decoded analog signals; a second conversion stage including a quantizing part to generate m parallel pieces of quantized signals from the m pieces of amplified residual signals; and a synthesizing part to generate m parallel pieces of digital signals by synthesizing each of the quantized signals in the first conversion stage and in the second conversion stage at each parallel position.

Abstract: An oscillator includes a plurality of oscillating units connected in parallel with each other, and a control unit which controls the number of parallel connections of the plurality of oscillating units based on an instruction signal indicating accuracy to be tolerated with respect to oscillation outputs of the oscillating units.

Abstract: A multiple input AD conversion apparatus includes a first unit AD converter including a plurality of first conversion stages connected in cascade to convert a first analog input signal to a first digital output signal, a second unit AD converter including a plurality of second conversion stages connected in cascade to convert a second analog input signal to a second digital output signal, and an operational amplifier shared between the first conversion stage and the second conversion stage in a time sharing.

Abstract: A multiple input AD conversion apparatus includes a first unit AD converter including a plurality of first conversion stages connected in cascade to convert a first analog input signal to a first digital output signal, a second unit AD converter including a plurality of second conversion stages connected in cascade to convert a second analog input signal to a second digital output signal, and an operational amplifier shared between the first conversion stage and the second conversion stage in a time sharing.

Abstract: An amplifier includes an amplification unit which amplify a first difference between first and second input signals, a second difference between second and third input signals and a third difference between third and first input signals by a differential mode gain, and amplify an average of the first, second and third input signal by a common mode gain, for outputting a first output signal corresponding to a sum of the amplified first difference and the amplified average, a second output signal corresponding to a sum of the amplified second difference and the amplified average, and a third output signal corresponding to a sum of the amplified third difference and amplified average; first, second; and a reduction circuit which reduces the common mode gain less than the differential mode gain.

Abstract: A multiplier includes a first input terminal which receives a modulated signal, three second input terminals which receive first, second, and third local signals respectively, the first, second, and third local signals having a phase difference of 120° from one another, a multiplication unit configured to multiply the modulated signal by each of the first, second, and third local signals, and output first, second, and third multiplied output signals, and three output terminals from which the first, second, and third multiplied output signals are derived, respectively.

Abstract: A clock generator having phase locked loops to receive reference signals from a shared reference signal source and generate clock signals differing in frequency, respectively, includes a phase comparator which generates a voltage signal in response to a phase difference between a phase of the reference signal and a phase of a feedback signal, a VCO controlled by a voltage signal from the phase comparator, and a frequency divider group connected in cascade in a feedback loop between an output of the VCO and an input of a feedback signal, and takes out a clock signals from each output of the frequency divider group.

Abstract: A multiple input AD conversion apparatus includes a first unit AD converter including a plurality of first conversion stages connected in cascade to convert a first analog input signal to a first digital output signal, a second unit AD converter including a plurality of second conversion stages connected in cascade to convert a second analog input signal to a second digital output signal, and an operational amplifier shared between the first conversion stage and the second conversion stage in a time sharing.

Abstract: A multiple input AD conversion apparatus includes a first unit AD converter including a plurality of first conversion stages connected in cascade to convert a first analog input signal to a first digital output signal, a second unit AD converter including a plurality of second conversion stages connected in cascade to convert a second analog input signal to a second digital output signal, and an operational amplifier shared between the first conversion stage and the second conversion stage in a time sharing.

Abstract: The present invention provides a surface treated steel sheet including a steel sheet; a plating layer containing at least one metal selected from the group consisting of zinc and aluminum on a surface of the steel sheet; and a film on the plating layer, the film containing at least one metal selected from the group consisting of Al, Mg, and Zn, a tetravalent vanadium compound, and a phosphoric acid group. This surface treated steel sheet exhibits excellent corrosion resistance and excellent surface appearance without containing hazardous substances, such as hexavalent chromium, in the film.

Abstract: A multiple input AD conversion apparatus includes a first unit AD converter including a plurality of first conversion stages connected in cascade to convert a first analog input signal to a first digital output signal, a second unit AD converter including a plurality of second conversion stages connected in cascade to convert a second analog input signal to a second digital output signal, and an operational amplifier shared between the first conversion stage and the second conversion stage in a time sharing.

Abstract: A variable gain amplifier device controlled by a first gain control signal comprises a gain controlled amplifier having a gain and including a differential pair of first and second MOS type transistors configured to operate in a weak inversion region; and a control signal converter configured to convert the first gain control signal into a second gain control signal, and supply the second gain control signal to the gain controlled amplifier to exponentially vary the gain with respect to the first gain control signal.

Abstract: A D/A converter includes a plurality of current sources configured to be on or off according to input digital data; a constant voltage source configured to apply a constant voltage to the current sources; current supply wirings provided between the constant voltage source and the respective current source, the current supply wirings respectively having equal length from the constant voltage source to the respective current source; ground-side wirings summing up output currents from the plurality of current sources; and output terminals connected to the ground-side wirings, the output terminals outputting analogue data corresponding to the input digital data.

Abstract: A variable gain amplifier device controlled by a first gain control signal comprises a gain controlled amplifier having a gain and including a differential pair of first and second MOS type transistors configured to operate in a weak inversion region; and a control signal converter configured to convert the first gain control signal into a second gain control signal, and supply the second gain control signal to the gain controlled amplifier to exponentially vary the gain with respect to the first gain control signal.

Abstract: A frequency converter comprising a variable gain amplifier which amplifies the local oscillation signal according to a gain control signal and outputs an amplified local signal, an even harmonic mixer which is supplied with an input signal and an amplified local oscillation signal and outputs an output signal whose frequency is a sum of a first frequency of the input signal and a second frequency of two or more even numbered times a frequency of the amplified local oscillation signal, an amplitude detector which is supplied with the amplified local oscillation signal and outputs a direct current signal having an amplitude corresponding to an amplitude of the amplified local oscillation signal, and a comparator which compares the direct current signal of the amplitude detector with the reference direct current signal to generate an output signal as the gain control signal.

Abstract: An operational amplifier circuit is constituted by first and second inverted amplifier circuits (A1, A2) that receive first and second input signals, a third inverted amplifier circuit (A3) that receives an estimated common-mode output signal and an output signal from the first inverted amplifier circuit and outputs first and second output signals, a fourth inverted amplifier circuit (A4) that receives the estimated common-mode output signal and an output signal from the second inverted amplifier circuit and outputs third and fourth output signals, where the estimated common-mode output signal is generated by adding the second output signal and the fourth output signal, and first and second non-inverted amplifier circuits (A5, A6) that receive the estimated common-mode output signal and feed it back to the first and second inverted amplifier circuits.