Abstract: Variable length code decoding device for decoding variable length code data, including: decoding process tables each including at least two kinds of formats consisting a first format storing identification information for designating a subsequent table to be referred to in a subsequent decoding process, and a second format that stores a decoded value obtained by repeating the decoding process and a significant bit length to be referred to with respect to variable length code data. The device utilizes first, second, third and fourth formats and relative addresses.

Abstract: The present invention provides a functional block that executes video coding and video decoding based on H. 264/AVC. The functional block includes two moving picture processing units, and a memory unit that stores therein data related to the results of processing of first plural macroblocks arranged within one row of one picture by the first moving picture processing unit. Data related to the results of processing of plural adjacent macroblocks, which are selected from the data stored in the memory unit, are transferred to the second moving picture processing unit. The second moving picture processing unit performs processing of one macroblock of second plural macroblocks arranged in the following row, using the transferred data.

Abstract: A variable length code decoding device for decoding variable length code data, including: a table memory that stores a plurality of decoding process tables having a reference relationship therein; and a decoding control unit that sequentially selects the decoding process tables according to the decoded data to control a process of decoding the variable length code data, wherein when referring to the decoding process table to perform an initial decoding of the variable length code data, the initial decoding process is conducted by a longer bit length to be clipped from the variable length code data for referring to the decoding process table than the bit length used when referring to the other portions of the decoding process table.

Abstract: The present invention provides a functional block that executes video coding and video decoding based on H.264/AVC. The functional block includes two moving picture processing units, and a memory unit that stores therein data related to the results of processing of first plural macroblocks arranged within one row of one picture by the first moving picture processing unit. Data related to the results of processing of plural adjacent macroblocks, which are selected from the data stored in the memory unit, are transferred to the second moving picture processing unit. The second moving picture processing unit performs processing of one macroblock of second plural macroblocks arranged in the following row, using the transferred data.

Abstract: A speaker of the present invention includes the following: a diaphragm that includes an inner periphery coupled to a voice coil, and a corrugation provided at the intermediate position between the inner periphery and an outer periphery; a speaker edge for supporting the outer periphery of the diaphragm; and a damping member attached to an outer peripheral part of the diaphragm outside the vicinity of an outer periphery of the corrugation. The effective vibration area of an inner peripheral part of the diaphragm inside an inner periphery of the corrugation is substantially half or less of the total effective vibration area. The damping member is configured as a damping portion by extending an overlap portion of the speaker edge overlapping with the diaphragm to the vicinity of the outer periphery of the corrugation.

Abstract: An optical scanning device comprises: photoreceptors corresponding one-to-one to solid colors; high-resolution light sources each emitting a set of beams irradiating the corresponding photoreceptor with a predetermined distance therebetween along a sub-scanning direction; a deflection unit; a first optical system directing the sets of beams from the high-resolution light sources to the deflection unit; a low-resolution light source emitting a set of beams irradiating a predetermined photoreceptor with a distance therebetween larger than the predetermined distance along the sub-scanning direction; and a second optical system directing all of the sets of beams to the corresponding photoreceptor.

Abstract: An optical scanning device in which optical beams from a light-emitting element are passed through a collimator lens and are deflected by a deflector and which scans over an image carrier by using the deflected optical beams, comprising: a device housing; and a holder supported on a base of the housing so as to be rotatable about an optical axis of the collimator lens, and penetrating through a through-hole in a side wall of the housing along the optical axis without contacting the side wall, wherein the holder includes first and second holder parts, the first holder part located inside the housing, and the second holder part located outside the housing, the collimator lens is held by the first holder part, the light-emitting element is held by the second holder part, and the optical beams pass through the through-hole in the side wall and reach the collimator lens.

Abstract: The data processor includes CPU operable to execute an instruction included in an instruction set. The instruction set includes a load instruction for reading data on a memory space. The data read according to the load instruction includes data of a format type having a data-read-branching-occurrence bit region. The CPU includes a data-read-branching control register; a data-read-branching address register; and a read-data-analyzing unit. On condition that a bit value showing the occurrence of data read branching has been set on the data-read-branching-occurrence bit region, and a value showing the data-read-branching-occurrence bit remaining valid has been set on the data-read-branching control register, the switching between processes is performed by branching to an address stored in the data-read-branching address register.

Abstract: A variable length code decoding device for decoding variable length code data, including: a table memory that stores a plurality of decoding process tables having a reference relationship therein; and a decoding control unit that sequentially selects the decoding process tables according to the decoded data to control a process of decoding the variable length code data, wherein when referring to the decoding process table to perform an initial decoding of the variable length code data, the initial decoding process is conducted by a longer bit length to be clipped from the variable length code data for referring to the decoding process table than the bit length used when referring to the other portions of the decoding process table.

Abstract: A moving image processor includes a first and a second moving image processing unit which are able to perform parallel operation, and a data transfer unit having a first buffer and a second buffer. The first moving image processing unit processes macroblocks MB00, - - - , of one row of one image sequentially, and the second moving image processing unit processes macroblocks MB10, - - - , of the next row sequentially. The first and the second moving image processors include a first and a second deblocking filters, respectively. Operation timing of the second filter is delayed by the processing time of two macroblocks, compared with operation timing of the first filter. The processing results of the first filter and the second filter are transferred to an external memory via the first buffer and the second buffer of the transfer unit.

Abstract: A variable length code decoding device for decoding variable length code data, including: a table memory that stores a plurality of decoding process tables having a reference relationship therein; and a decoding control unit that is given a start address and an initial reference bit length of the table memory; and sequentially selects the decoding process tables according to the decoded data to control a process of decoding the variable length code data, wherein when referring to the decoding process table to perform an initial decoding of the variable length code data, the initial decoding process is conducted by a longer bit length to be clipped from the variable length code data for referring to the decoding process table than the bit length used when referring to the other portions of the decoding process table.

Abstract: The present invention relates to a video transmission system that uses an encoding/decoding technique. An object of the present invention is to refrain from using a memory for storing decoded image data, avoid a decoder input buffer problem (buffer overflow or underflow) with ease, achieve cost reduction, and provide enhanced image quality. In the video transmission system with an encoding/decoding device, a reference signal for adjusting a synchronization schedule of the entire system is generated and supplied to various sections. In addition, a timing adjustment amount for adjusting the synchronization schedule for the reference signal is generated by a decoder and supplied to a camera.

Abstract: A first delay memory is input with an input image frame output from a ME (motion estimation) processor, and delays output to a first adder for carrying out a prediction residual generation process a predetermined time period. A second delay memory is input with an inter-prediction luminance image frame, and delays output to a prediction selection circuit a predetermined time period. A third delay memory is input with motion vector information output from the ME processor, and delays output of the motion vector information to an inter-prediction chrominance image creation processor a predetermined time period.

Abstract: The variable length decoder has a memory device including a plurality of lookup tables, and sequentially decodes codewords of variable-length codes using the memory device. The decoded values corresponding to the codewords and control information pieces are stored in the lookup tables. In decoding one codeword, one lookup table is selected from among the plurality of lookup tables. In the decode, one decoded value corresponding to the one codeword, and a control information piece for selecting a next lookup table depending on the decoded value and used for a next decode are produced from the selected lookup table in response to the one codeword in parallel.

Abstract: A speaker of the present invention includes a frame at which a magnetic circuit is mounted, a voice coil, an arched diaphragm, and an edge made of material different from that of the diaphragm. A part of the voice coil is disposed at a magnetic gap formed by the magnetic circuit. The diaphragm is coupled with the voice coil, and the edge links the diaphragm with the frame. Further, the diaphragm includes an inner-diameter-fixing part to be joined with the voice coil, an outer-diameter-fixing part to be joined with the edge, and a top part formed between the inner-diameter-fixing part and the outer-diameter-fixing part to protrude forward. A part near the top part differs from a part other than the part near the top part of the diaphragm in at least one of thickness and density. This structure flattened sound-pressure-frequency characteristic over broad bands.

Abstract: A variable length code decoding device for decoding variable length code data, including: a table memory that stores a plurality of decoding process tables having a reference relationship therein; and a decoding control unit that is given a start address and an initial reference bit length of the table memory; and sequentially selects the decoding process tables according to the decoded data to control a process of decoding the variable length code data, wherein when referring to the decoding process table to perform an initial decoding of the variable length code data, the initial decoding process is conducted by a longer bit length to be clipped from the variable length code data for referring to the decoding process table than the bit length used when referring to the other portions of the decoding process table.

Abstract: The present invention provides a stream processing apparatus capable of improving the processing performance in the case of continuously processing a plurality of data streams. A control stream, different from a data stream, is prepared, and a program and a parameter are updated in advance in accordance with the control stream. Double buffer areas are prepared in a memory of the stream processing apparatus into which the program and the parameter are stored. The location of the data stream to be input is written in the control stream, and buffers for reading the data stream are multiplexed so as to read in advance the top portion of the data stream to be processed next.

Abstract: A flag indicating whether a decoding process is completed or continued is disposed in each of entries of a decoding process table. A decoded value and a significant bit length are recorded in the entry of a decoding process completion. Information for identifying the decoding process table which is used in a subsequent process, and a bit length that is clipped from a code word which is used when referring to a subsequent table are recorded in the entry of the decoding process continuation. When the decoding process starts, the information for identifying the table to be used and the bit length that is referred to from the code word when referring to the table are designated together with the code word. The decoding process table reference is repeated as the occasion demands. With the above configuration, there is provided a variable length code decoding device.

Abstract: When an error is detected in an error detecting unit in a processor system, the error detecting unit outputs an error signal to an interrupt control unit, and the interrupt control unit outputs a value of an error address register and a control signal to a program counter control unit and rewrites a value of a program counter to a value of an error address register. By this means, the branching process by an error interrupt is realized. In this case, when the error is detected, the process of saving the value of the program counter at the time of error occurrence is not performed, and a specific save register and a control circuit for the recovery to the address at the time of the error occurrence after the end of the error processing are not provided.

Abstract: An image decoding device according to the present invention is an image decoding device responding to decoding of an image encoding method selecting an encoding table and an encoding format to use according to the kind of a parameter included in encoded data and comprises a bit stream processing unit converting a bit stream of the encoded data into an intermediate format and an image processing unit decoding data converted into the intermediate format and converting the same into image data. The bit stream processing unit and the image processing unit start independently. An image encoding device according to the present invention, in the same manner, comprises an image processing unit converting image data to be encoded into an intermediate format and a bit stream processing unit encoding the data converted into the intermediate format and converting the same into a bit stream. Thereby, image encoding and decoding processings with a low operation frequency and low power consumption is realized.