Patents by Inventor Takahide Mukoyama
Takahide Mukoyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9049794Abstract: A wiring substrate includes an insulation layer including a thermosetting resin and a reinforcement member having plural first fiber bundles and plural second fiber bundles woven together, the second fiber bundles being intersected with the first fiber bundles, and a pair of differential wirings arranged alongside each other on the insulation layer. The first fiber bundles and the second fiber bundles have a curved portion relative to a plan direction of the insulation layer in a region on which the pair of differential wirings is arranged.Type: GrantFiled: March 30, 2011Date of Patent: June 2, 2015Assignee: FUJITSU LIMITEDInventors: Yoshihiro Morita, Takahiro Ooi, Tetsuro Yamada, Akiko Matsui, Mitsuhiko Sugane, Takahide Mukoyama
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Publication number: 20150116962Abstract: An electronic device includes an electronic component including a plurality of terminals and a circuit board on which the electronic component is mounted. The circuit board includes a board body, a plurality of electrode pads arranged on the board body, each of the electrode pads being connected to each of the terminals by solder, a first solder resist formed on the board body and having a plurality of first openings, each of the first openings accommodating each of the electrode pads, and a second solder resist formed on the first solder resist and having a plurality of second openings, each of the second openings being larger than each of the first openings and communicating with each of the first openings.Type: ApplicationFiled: December 31, 2014Publication date: April 30, 2015Inventors: Yoshiyuki HIROSHIMA, Akiko MATSUI, Mitsuhiko SUGANE, Takahide MUKOYAMA, Tetsuro YAMADA, Takahiro OOI
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Patent number: 8958211Abstract: An electronic device includes an electronic component including a plurality of terminals and a circuit board on which the electronic component is mounted. The circuit board includes a board body, a plurality of electrode pads arranged on the board body, each of the electrode pads being connected to each of the terminals by solder, a first solder resist formed on the board body and having a plurality of first openings, each of the first openings accommodating each of the electrode pads, and a second solder resist formed on the first solder resist and having a plurality of second openings, each of the second openings being larger than each of the first openings and communicating with each of the first openings.Type: GrantFiled: November 21, 2011Date of Patent: February 17, 2015Assignee: Fujitsu LimitedInventors: Yoshiyuki Hiroshima, Akiko Matsui, Mitsuhiko Sugane, Takahide Mukoyama, Tetsuro Yamada, Takahiro Ooi
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Publication number: 20140077834Abstract: A printed wiring board includes: a laminated body that has a plurality of wiring layers laminated therein; a first through hole that electrically connects two or more wiring layers with each other; and a second through hole that has strength to expansion and contraction of the laminated body less than in the first through hole.Type: ApplicationFiled: July 15, 2013Publication date: March 20, 2014Inventors: Shigeo IRIGUCHI, Naoki NAKAMURA, Shigeru SUGINO, Takahide MUKOYAMA, Ryo KANAI, Nobuo TAKETOMI, Kiyoyuki HATANAKA
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Patent number: 8648260Abstract: A wiring substrate includes differential wirings; a first insulating layer adjacent to one side of the differential wirings, including first fiber bundles parallel to the differential wirings; a second insulating layer adjacent to another side of the differential wirings, including second fiber bundles parallel to the differential wirings and disposed by the same pitch as the first fiber bundles; a third insulating layer on the first insulating layer on a side opposite to the differential wirings, including third fiber bundles in parallel to the differential wirings; and a fourth insulating layer on the second insulating layer on a side opposite to the differential wirings, including fourth fiber bundles in parallel to the differential wirings. Intervals of the third and fourth fiber bundles are respectively narrower than intervals of the first and second fiber bundles. The differential wirings are disposed between adjacent first fiber bundles, and between adjacent second fiber bundles.Type: GrantFiled: March 30, 2011Date of Patent: February 11, 2014Assignee: Fujitsu LimitedInventors: Takahiro Ooi, Yoshihiro Morita, Akiko Matsui, Tetsuro Yamada, Mitsuhiko Sugane, Takahide Mukoyama
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Patent number: 8631568Abstract: A printed wiring board manufacturing method includes weaving a glass fiber cloth with warp and weft yarns such that the warp and weft yarns are visually distinguishable at least a region. The glass fiber cloth is impregnated with a resin to fabricate a substrate. A copper foil is formed on at least one surface of the substrate to fabricate a core substrate. The copper foil is removed within the region on the core substrate to form an opening. A pitch between the warp yarns or between the weft yarns which are presented in the opening is detected. A pitch between a pair of differential wirings to be patterned is determined based on the detected pitch between the warp yarns or between the weft yarns. The pair of differential wirings is patterned on the core substrate in accordance with the determined pitch between the pair of differential wirings.Type: GrantFiled: March 11, 2011Date of Patent: January 21, 2014Assignee: Fujitsu LimitedInventors: Tetsuro Yamada, Takahiro Ooi, Yoshihiro Morita, Akiko Matsui, Misuhiko Sugane, Takahide Mukoyama
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Patent number: 8595926Abstract: A printed wiring board manufacturing method includes weaving a glass fiber cloth with warp and weft yarns such that the warp and weft yarns are visually distinguishable at least a region. The glass fiber cloth is impregnated with a resin to fabricate a substrate. A copper foil is formed on at least one surface of the substrate to fabricate a core substrate. The copper foil is removed within the region on the core substrate to form an opening. A pitch between the warp yarns or between the weft yarns which are presented in the opening is detected. A pitch between a pair of differential wirings to be patterned is determined based on the detected pitch between the warp yarns or between the weft yarns. The pair of differential wirings is patterned on the core substrate in accordance with the determined pitch between the pair of differential wirings.Type: GrantFiled: March 11, 2011Date of Patent: December 3, 2013Assignee: Fujitsu LimitedInventors: Tetsuro Yamada, Takahiro Ooi, Yoshihiro Morita, Akiko Matsui, Misuhiko Sugane, Takahide Mukoyama
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Publication number: 20120234587Abstract: A printed wiring board is disclosed that includes insulating layers, conductive layers stacked with the insulating layers alternately, a through hole penetrating the insulating layers and the conductive layers, a first plate resist part formed on a first portion of an inner wall of the through hole, the first portion being located from one end of the through hole to one of the conductive layers stacked between one pair of the insulating layers, and a plated part formed on a second portion of the inner wall of the through hole other than the first portion.Type: ApplicationFiled: March 8, 2012Publication date: September 20, 2012Applicant: FUJITSU LIMITEDInventors: Naoki NAKAMURA, Mitsuhiko SUGANE, Akiko MATSUI, Tetsuro YAMADA, Takahide MUKOYAMA, Yoshiyuki HIROSHIMA, Takahiro OOI
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Publication number: 20120188735Abstract: An electronic device includes an electronic component including a plurality of terminals and a circuit board on which the electronic component is mounted. The circuit board includes a board body, a plurality of electrode pads arranged on the board body, each of the electrode pads being connected to each of the terminals by solder, a first solder resist formed on the board body and having a plurality of first openings, each of the first openings accommodating each of the electrode pads, and a second solder resist formed on the first solder resist and having a plurality of second openings, each of the second openings being larger than each of the first openings and communicating with each of the first openings.Type: ApplicationFiled: November 21, 2011Publication date: July 26, 2012Applicant: FUJITSU LIMITEDInventors: Yoshiyuki HIROSHIMA, Akiko MATSUI, Mitsuhiko SUGANE, Takahide MUKOYAMA, Tetsuro YAMADA, Takahiro OOI
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Publication number: 20120106105Abstract: A wiring board unit includes a connector having a plurality of terminals; and a wiring board on which the connector is mounted. The wiring board includes a first wiring pattern provided on a first wiring layer, a second wiring pattern provided on a second wiring layer at a position shallower than the first wiring layer, a first via formed in a first recess having a first depth, the first via being in contact with the first wiring pattern, and a second via formed in a second recess having a second depth that is smaller than the first depth, the second via being in contact with the second wiring pattern.Type: ApplicationFiled: October 11, 2011Publication date: May 3, 2012Applicant: FUJITSU LIMITEDInventors: Mitsuhiko SUGANE, Takahide Mukoyama, Tetsuro Yamada, Yoshiyuki Hiroshima, Takahiro Ooi, Midori Kobayashi, Akiko Matsui
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Publication number: 20110308840Abstract: A wiring substrate includes differential wirings; a first insulating layer adjacent to one side of the differential wirings, including first fiber bundles parallel to the differential wirings; a second insulating layer adjacent to another side of the differential wirings, including second fiber bundles parallel to the differential wirings and disposed by the same pitch as the first fiber bundles; a third insulating layer on the first insulating layer on a side opposite to the differential wirings, including third fiber bundles in parallel to the differential wirings; and a fourth insulating layer on the second insulating layer on a side opposite to the differential wirings, including fourth fiber bundles in parallel to the differential wirings. Intervals of the third and fourth fiber bundles are respectively narrower than intervals of the first and second fiber bundles. The differential wirings are disposed between adjacent first fiber bundles, and between adjacent second fiber bundles.Type: ApplicationFiled: March 30, 2011Publication date: December 22, 2011Applicant: FUJITSU LIMITEDInventors: Takahiro OOI, Yoshihiro MORITA, Akiko MATSUI, Tetsuro YAMADA, Mitsuhiko SUGANE, Takahide MUKOYAMA
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Publication number: 20110308842Abstract: A wiring substrate includes an insulation layer including a thermosetting resin and a reinforcement member having plural first fiber bundles and plural second fiber bundles woven together, the second fiber bundles being intersected with the first fiber bundles, and a pair of differential wirings arranged alongside each other on the insulation layer. The first fiber bundles and the second fiber bundles have a curved portion relative to a plan direction of the insulation layer in a region on which the pair of differential wirings is arranged.Type: ApplicationFiled: March 30, 2011Publication date: December 22, 2011Applicant: FUJITSU LIMITEDInventors: Yoshihiro MORITA, Takahiro OOI, Tetsuro YAMADA, Akiko MATSUI, Mitsuhiko SUGANE, Takahide MUKOYAMA
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Publication number: 20110232949Abstract: A printed wiring board manufacturing method includes weaving a glass fiber cloth with warp and weft yarns such that the warp and weft yarns are visually distinguishable at least a region. The glass fiber cloth is impregnated with a resin to fabricate a substrate. A copper foil is formed on at least one surface of the substrate to fabricate a core substrate. The copper foil is removed within the region on the core substrate to form an opening. A pitch between the warp yarns or between the weft yarns which are presented in the opening is detected. A pitch between a pair of differential wirings to be patterned is determined based on the detected pitch between the warp yarns or between the weft yarns. The pair of differential wirings is patterned on the core substrate in accordance with the determined pitch between the pair of differential wirings.Type: ApplicationFiled: March 11, 2011Publication date: September 29, 2011Applicant: FUJITSU LIMITEDInventors: Tetsuro YAMADA, Takahiro OOI, Yoshihiro MORITA, Akiko MATSUI, Misuhiko SUGANE, Takahide MUKOYAMA
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Patent number: 5825635Abstract: A warp prevention structure for a printed circuit board, capable of serving also to perform the slack handling of cables. The warp prevention structure includes a first warp prevention fitting mounted on the printed circuit board in the vicinity of an upper edge thereof so as to extend along the upper edge, and a second warp prevention fitting mounted on the printed circuit board in the vicinity of a lower edge thereof so as to extend along the lower edge. Each of the first and second warp prevention fittings is integrally formed with a plurality of cable holders arranged at equal intervals.Type: GrantFiled: October 17, 1995Date of Patent: October 20, 1998Assignee: Fujitsu LimitedInventors: Takahide Mukoyama, Fujio Ozawa, Takashi Inoue, Katsunori Suzuki, Yasutaka Tsuruoka, Mieko Hirao, Kozo Mori