Abstract: A method for producing a Group III nitride semiconductor comprising forming mesas on a main surface of a substrate, and growing Group III nitride semiconductor in a c-axis direction thereof, wherein the plane most parallel to the side surfaces of the mesas or the dents among the low-index planes of growing Group III nitride semiconductor is a m-plane (1-100), and when a projected vector obtained by orthogonally projecting a normal vector of the processed side surface to the main surface is defined as a lateral vector, an angle between the lateral vector and a projected vector obtained by orthogonally projecting a normal vector of the m-plane of the growing Group III nitride semiconductor to the main surface is 0.5° or more and 6° or less.

Abstract: Group III nitride semiconductor having reduced threading dislocation density and uniform Ga-polar surface is provided. Forming a capping layer on a buffer layer containing Al as an essential element at a temperature lower than a temperature at which an oxide of element constituting the buffer layer is formed. Heat treating the substrate having the buffer layer covered by the capping layer at a temperature higher than a temperature at which a crystal of body semiconductor grows without exposing the surface of the buffer layer. The substrate temperature is decreased to a temperature at which a crystal of the body semiconductor grows and the body semiconductor is grown.

Abstract: A first side surface of post of the first stripe is formed so that a plane which is most parallel to the first side surface among low-index planes of the growing Group III nitride semiconductor is a m-plane (10-10), and a first angle between the first lateral vector obtained by orthogonally projecting a normal vector of the first side surfaces to the main surface and a m-axis projected vector obtained by orthogonally projecting a normal vector of the m-plane of the growing semiconductor to the main surface is from 0.5° to 6°. A second side surface of post of the second stripe is formed so that a plane which is most parallel to the second side surface among low-index planes of the growing semiconductor is an a-plane (11-20), and a second angle between the second lateral vector and an a-axis projected vector of the a-plane is from 0° to 10°.

Abstract: A method for producing a Ga-containing group III nitride semiconductor having reduced threading dislocation is disclosed. A buffer layer in a polycrystal, amorphous or polycrystal/amorphous mixed state, comprising AlGaN is formed on a substrate. The substrate having the buffer layer formed thereon is heat-treated at a temperature higher than a temperature at which a single crystal of a Ga-containing group III nitride semiconductor grows on the buffer layer and at a temperature that the Ga-containing group III nitride semiconductor does not grow, to reduce crystal nucleus density of the buffer layer as compared with the density before the heat treatment. After the heat treatment, the temperature of the substrate is decreased to a temperature that the Ga-containing group III nitride semiconductor grows, the temperature is maintained, and the Ga-containing group III nitride semiconductor is grown on the buffer layer.

Abstract: A first side surface of post of the first stripe is formed so that a plane which is most parallel to the first side surface among low-index planes of the growing Group III nitride semiconductor is a m-plane (10-10), and a first angle between the first lateral vector obtained by orthogonally projecting a normal vector of the first side surfaces to the main surface and a m-axis projected vector obtained by orthogonally projecting a normal vector of the m-plane of the growing semiconductor to the main surface is from 0.5° to 6°. A second side surface of post of the second stripe is formed so that a plane which is most parallel to the second side surface among low-index planes of the growing semiconductor is an a-plane (11-20), and a second angle between the second lateral vector and an a-axis projected vector of the a-plane is from 0° to 10°.

Abstract: Group III nitride semiconductor having reduced threading dislocation density and uniform Ga-polar surface is provided. Forming a capping layer on a buffer layer containing Al as an essential element at a temperature lower than a temperature at which an oxide of element constituting the buffer layer is formed. Heat treating the substrate having the buffer layer covered by the capping layer at a temperature higher than a temperature at which a crystal of body semiconductor grows without exposing the surface of the buffer layer. The substrate temperature is decreased to a temperature at which a crystal of the body semiconductor grows and the body semiconductor is grown.

Abstract: A method for producing a Group III nitride semiconductor comprising forming mesas on a main surface of a substrate, and growing Group III nitride semiconductor in a c-axis direction thereof, wherein the plane most parallel to the side surfaces of the mesas or the dents among the low-index planes of growing Group III nitride semiconductor is a m-plane (1-100), and when a projected vector obtained by orthogonally projecting a normal vector of the processed side surface to the main surface is defined as a lateral vector, an angle between the lateral vector and a projected vector obtained by orthogonally projecting a normal vector of the m-plane of the growing Group III nitride semiconductor to the main surface is 0.5° or more and 6° or less.

Abstract: A method for producing a Ga-containing group III nitride semiconductor having reduced threading dislocation is disclosed. A buffer layer in a polycrystal, amorphous or polycrystal/amorphous mixed state, comprising AlGaN is formed on a substrate. The substrate having the buffer layer formed thereon is heat-treated at a temperature higher than a temperature at which a single crystal of a Ga-containing group III nitride semiconductor grows on the buffer layer and at a temperature that the Ga-containing group III nitride semiconductor does not grow, to reduce crystal nucleus density of the buffer layer as compared with the density before the heat treatment. After the heat treatment, the temperature of the substrate is decreased to a temperature that the Ga-containing group III nitride semiconductor grows, the temperature is maintained, and the Ga-containing group III nitride semiconductor is grown on the buffer layer.

Abstract: A light-emitting device has two light-emitting element. In a substrate portion of the light-emitting device having a first internal positive electrode connected to the positive electrode side of a first light-emitting element, a first internal negative electrode connected to the negative electrode side of the first light-emitting element, a second internal positive electrode connected to the positive electrode side of a second light-emitting element, and a second internal negative electrode connected to the negative electrode side of the second light-emitting element, these electrodes are provided so that homopolar electrodes are disposed diagonally.

Abstract: A light-emitting device has two light-emitting element. In a substrate portion of the light-emitting device having a first internal positive electrode connected to the positive electrode side of a first light-emitting element, a first internal negative electrode connected to the negative electrode side of the first light-emitting element, a second internal positive electrode connected to the positive electrode side of a second light-emitting element, and a second internal negative electrode connected to the negative electrode side of the second light-emitting element, these electrodes are provided so that homopolar electrodes are disposed diagonally.

Abstract: A wafer comprising a semiconductor layer formed on a substrate is diced on the back surface of the substrate to a depth of about ¾ thickness of the substrate. Thus a separation groove 21 is formed in a direction of a dicing line. A groove 22 is formed at the portion of the semiconductor layer corresponding to the groove 21. The groove 22 reaches the substrate. The back surface 11b of the substrate 11 is polished until the substrate become a lamella having only a trace of the groove 22. A metal layer 10 is formed by depositing aluminum (Al) so as to cover the entire back 11b of the substrate 11, and a groove 23 formed at the portion of the metal layer corresponding to the groove 21. An adhesive sheet 24 is adhered on an electrode pad 20. A scribe line is formed by scribing the metal layer 10 along the groove 23. The wafer is loaded by a roller in a breaking process. Accordingly, a wafer having the metal layer on the back surface 11b of the substrate can be obtained.

Abstract: A wafer comprising a semiconductor layer formed on a substrate is diced on the back surface of the substrate to a depth of about ¾ thickness of the substrate. Thus a separation groove 21 is formed in a direction of a dicing line. A groove 22 is formed at the portion of the semiconductor layer corresponding to the groove 21. The groove 22 reaches the substrate. The back surface 11b of the substrate 11 is polished until the substrate become a lamella having only a trace of the groove 22. A metal layer 10 is formed by depositing aluminum (Al) so as to cover the entire back 11b of the substrate 11, and a groove 23 formed at the portion of the metal layer corresponding to the groove 21. An adhesive sheet 24 is adhered on an electrode pad 20. A scribe line is formed by scribing the metal layer 10 along the groove 23. The wafer is loaded by a roller in a breaking process. Accordingly, a wafer having the metal layer on the back surface 11b of the substrate can be obtained.

Abstract: A device and a method for fabricating said device provides a semiconductor light-emitting element having an electrode and a protective film layer that is sealed with an insulating resin, which is hardened at high temperature. After completion of the hardening process, the semiconductor light-emitting element is heat treated in an atmosphere of normal or higher humidity. Preferably, the heat treatment is performed at a temperature of 60° C. or higher in an atmosphere having an absolute humidity of 10 KPa or higher. When the heat treatment is performed at or above 10 KPa, the heat treatment can be completed within a shorter timeframe in comparison to such a device heat treated at an absolute humidity of less than 10 kPa.

Abstract: A wafer comprising a semiconductor layer formed on a substrate is diced on the back surface of the substrate to a depth of about ¾ thickness of the substrate. Thus a separation groove 21 is formed in a direction of a dicing line. A groove 22 is formed at the portion of the semiconductor layer corresponding to the groove 21. The groove 22 reaches the substrate. The back surface 11b of the substrate 11 is polished until the substrate become a lamella having only a trace of the groove 22. A metal layer 10 is formed by depositing aluminum (Al) so as to cover the entire back 11b of the substrate 11, and a groove 23 formed at the portion of the metal layer corresponding to the groove 21. An adhesive sheet 24 is adhered on an electrode pad 20. A scribe line is formed by scribing the metal layer 10 along the groove 23. The wafer is loaded by a roller in a breaking process. Accordingly, a wafer having the metal layer on the back surface 11b of the substrate can be obtained.

Abstract: A device and a method for fabricating said device provides a semiconductor light-emitting element having an electrode and a protective film layer that is sealed with an insulating resin, which is hardened at high temperature. After completion of the hardening process, the semiconductor light-emitting element is heat treated in an atmosphere of normal or higher humidity. Preferably, the heat treatment is performed at a temperature of 60° C. or higher in an atmosphere having an absolute humidity of 10 KPa or higher. When the heat treatment is performed at or above 10 KPa, the heat treatment can be completed within a shorter timeframe in comparison to such a device heat treated at an absolute humidity of less than 10 kPa.

Abstract: A light-emitting semiconductor device (10) consecutively has a sapphire substrate (1), an AlN buffer layer (2), a silicon (Si) doped GaN n.sup.+ -layer (3) of high carrier (n-type) concentration, a Si-doped (Al.sub.X2 Ga.sub.1-x2).sub.y2 In.sub.1-y2 N n.sup.+ -layer (4) of high carrier (n-type) concentration, a zinc (Zn) and Si-doped (Al.sub.x1 Ga.sub.1-x1).sub.y1 In.sub.1-y1 N emission layer (5), and a Mg-doped (Al.sub.x2 Ga.sub.1-x2).sub.y2 In.sub.1-y2 N p-layer (6). The AlN buffer layer (2) has a 500 .ANG. thickness. The GaN n.sup.+ -layer (3) is about 2.0 .mu.m thick and has a 2.times.10.sup.18 /cm.sup.3 electron concentration. The n.sup.+ -layer (4) is about 2.0 .mu.m thick and has a 2.times.10.sup.18 /cm.sup.3 electron concentration. The emission layer (5) is about 0.5 .mu.m thick. The p-layer 6 is about 1.0 .mu.m thick and has a 2.times.10.sup.17 /cm.sup.3 hole concentration. Nickel electrodes (7, 8) are connected to the p-layer (6) and n.sup.+ -layer (4), respectively.