Patents by Inventor Takahiko Kawasaki
Takahiko Kawasaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11883926Abstract: A polishing pad is described. The polishing pad includes a surface having plural recess portions, and a substrate is polished by the surface. In the pad, an average width of the recess portions at one area of the surface in a direction parallel to the surface is 20 ?m or less, and an average density of the recess portions at one area of the surface is 1,300/mm2 or more.Type: GrantFiled: May 13, 2021Date of Patent: January 30, 2024Assignee: KIOXIA CORPORATIONInventors: Takahiko Kawasaki, Yukiteru Matsui, Akifumi Gawase
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Publication number: 20210260719Abstract: A polishing pad is described. The polishing pad includes a surface having plural recess portions, and a substrate is polished by the surface. In the pad, an average width of the recess portions at one area of the surface in a direction parallel to the surface is 20 ?m or less, and an average density of the recess portions at one area of the surface is 1,300/mm2 or more.Type: ApplicationFiled: May 13, 2021Publication date: August 26, 2021Applicant: TOSHIBA MEMORY CORPORATIONInventors: Takahiko KAWASAKI, Yukiteru MATSUI, Akifumi GAWASE
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Patent number: 10998283Abstract: A semiconductor device production method includes forming a first recess portion in a first insulating film formed on a first substrate and a first conductive layer on the front surface of the first insulating film located inside and outside the first recess portion. In the first recess portion, a first pad is formed having a width of 3 ?m or less and including the first conductive layer by performing a first polishing the first conductive layer at a first polishing rate and, after the first polishing, a second polishing the first conductive layer at a second polishing rate lower than the first polishing rate. The first pad of the first substrate and a second pad of a second substrate are joined together by annealing the first substrate and the second substrate. The selection ratio of the first conductive layer to the first insulating film is 0.3 to 0.4.Type: GrantFiled: February 28, 2019Date of Patent: May 4, 2021Assignee: TOSHIBA MEMORY CORPORATIONInventors: Takahiko Kawasaki, Yukiteru Matsui, Akifumi Gawase
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Patent number: 10991588Abstract: In accordance with an embodiment, a manufacturing method of a semiconductor device includes bringing a first catalyst into contact with a workpiece to form an oxide film on a surface of the workpiece, and bringing a second catalyst different from the first catalyst and the oxide film into contact with each other or moving the second catalyst and the oxide film closer to each other to elute the oxide film into a treatment liquid.Type: GrantFiled: November 6, 2017Date of Patent: April 27, 2021Assignee: TOSHIBA MEMORY CORPORATIONInventors: Akifumi Gawase, Yukiteru Matsui, Takahiko Kawasaki
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Publication number: 20210069861Abstract: A grinding apparatus according to an embodiment comprises: a table to hold a substrate; a grinding stone driver to be rotatable while holding a grinding stone; and a location adjuster to adjust a relative location between the grinding stone driver and the table. The grinding stone has steps including a first grinding face and a second grinding face, and a first distance between a rotation center of the grinding stone driver and the first grinding face is different from a second distance between the rotation center and the second grinding face. The location adjuster adjusts the relative location from a first state in which the first grinding face is in contact with an end face of the substrate to a second state in which the second grinding face is in contact with the end face.Type: ApplicationFiled: March 10, 2020Publication date: March 11, 2021Applicant: Kioxia CorporationInventors: Takahiko KAWASAKI, Kazufumi NOMURA
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Publication number: 20210039224Abstract: According to one embodiment, a polishing apparatus includes a polishing head having a retainer surrounding a substrate to be polished, and a polishing pad facing the polishing head. The retainer includes a first material and a second material. The first material contains at least one of aromatic polyamide, polyphenylene sulfide, polyetherimide, polyamideimide, polyetheretherketone, or polybenzimidazole. The second material contains a fluororesin.Type: ApplicationFiled: March 2, 2020Publication date: February 11, 2021Applicant: KIOXIA CORPORATIONInventor: Takahiko KAWASAKI
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Patent number: 10850363Abstract: In accordance with an embodiment, a manufacturing method of a semiconductor device includes detecting elastic waves, and detecting or predicting an abnormality of the processing object occurring during polishing of the processing object. The elastic waves are generated from the processing object during the polishing. The abnormality is detected or predicted by analyzing the detected elastic waves.Type: GrantFiled: September 2, 2015Date of Patent: December 1, 2020Assignee: Toshiba Memory CorporationInventors: Yukiteru Matsui, Takahiko Kawasaki, Akifumi Gawase, Shuji Suzuki, Tsutomu Miki
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Patent number: 10811562Abstract: A light emitting diode including: a columnar laminated structure 20 in which a first compound semiconductor layer 21, a light emitting layer 23, and a first portion 22A of a second compound semiconductor layer are laminated; a first electrode 31 electrically connected to the first compound semiconductor layer 21; and a second electrode 32. A second portion 22B of the second compound semiconductor layer is formed on the first portion 22A of the second compound semiconductor layer, apart from an edge portion 22a3 of the first portion 22A of the second compound semiconductor layer, the second electrode 32 is formed at least on a top surface of the second portion 22B of the second compound semiconductor layer, and light is outputted at least from the top surface 22b1 and a side surface 22b2 of the second portion 22B of the second compound semiconductor layer.Type: GrantFiled: October 22, 2015Date of Patent: October 20, 2020Assignee: SONY CORPORATIONInventors: Hidekazu Aoyagi, Takahiro Arakida, Takahiko Kawasaki, Katsutoshi Itou, Makoto Nakashima
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Publication number: 20190283206Abstract: A polishing pad is described. The polishing pad includes a surface having plural recess portions, and a substrate is polished by the surface. In the pad, an average width of the recess portions at one area of the surface in a direction parallel to the surface is 20 ?m or less, and an average density of the recess portions at one area of the surface is 1,300/mm2 or more.Type: ApplicationFiled: August 22, 2018Publication date: September 19, 2019Applicant: TOSHIBA MEMORY CORPORATIONInventors: Takahiko KAWASAKI, Yukiteru MATSUI, Akifumi GAWASE
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Patent number: 10195716Abstract: According to one embodiment, a dresser includes a base metal plate, and a plurality of chip portions that are provided on the base metal plate. Each chip portion includes a Si substrate having a projection at an upper portion thereof and a diamond layer provided on the projection of the Si substrate.Type: GrantFiled: February 10, 2017Date of Patent: February 5, 2019Assignee: TOSHIBA MEMORY CORPORATIONInventors: Takahiko Kawasaki, Yukiteru Matsui, Akifumi Gawase
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Patent number: 10121677Abstract: In accordance with an embodiment, a manufacturing method of a semiconductor device includes forming, on a substrate, protruding portions with first films on the surfaces thereof, respectively, forming a second film different from the first films so as to fill a depressed portion between the protruding portions and to cover the protruding portions, processing in such a manner that the top surface of the second film on the depressed portion is higher than the top surface of the second film on the protruding portions after forming the second film to cover the protruding portions, and polishing the second film on the depressed and protruding portions to expose the first films.Type: GrantFiled: January 6, 2016Date of Patent: November 6, 2018Assignee: Toshiba Memory CorporationInventors: Yukiteru Matsui, Takahiko Kawasaki, Akifumi Gawase, Kenji Iwade
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Publication number: 20180277388Abstract: A manufacturing method of a semiconductor device according to an embodiment implants impurities into a central portion of a polishing target film or an outer peripheral portion of the central portion of the polishing target film to cause an impurity concentration in the outer peripheral portion of the polishing target film and an impurity concentration in the central portion thereof to be different from each other, thereby modifying a surface of the polishing target film. The modified surface of the polishing target film is polished by a CMP method.Type: ApplicationFiled: May 30, 2018Publication date: September 27, 2018Applicant: Toshiba Memory CorporationInventors: Yukiteru MATSUI, Kyoichi SUGURO, Akifumi GAWASE, Takahiko KAWASAKI
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Patent number: 10079153Abstract: In a substrate processing method according to the embodiment, a first material is implanted into a surface of a target film to modify the surface of the target film. The surface of the target film is dissolved to remove the surface of the target film by bringing a catalytic material close to the surface of the target film or by contacting the catalytic material to the surface of the target film while supplying a process solution on the surface of the target film which has been modified.Type: GrantFiled: February 16, 2017Date of Patent: September 18, 2018Assignee: Toshiba Memory CorporationInventors: Akifumi Gawase, Yukiteru Matsui, Takahiko Kawasaki
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Patent number: 10010997Abstract: In accordance with an embodiment, a polishing method includes supplying slurry to a surface of a polishing layer including a polymer, and bringing a polishing object into contact with the polishing layer to polish the polishing object. The polishing layer has a fibrous first substance mixed therein or contains a second substance. The second substance is higher in specific heat and higher in thermal conductivity than the polymer in such a manner that the second substance is surrounded by the polymer.Type: GrantFiled: September 8, 2015Date of Patent: July 3, 2018Assignee: Toshiba Memory CorporationInventors: Akifumi Gawase, Yukiteru Matsui, Takahiko Kawasaki, Yosuke Otsuka, Hajime Eda
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Patent number: 10008390Abstract: A manufacturing method of a semiconductor device according to an embodiment implants impurities into a central portion of a polishing target film or an outer peripheral portion of the central portion of the polishing target film to cause an impurity concentration in the outer peripheral portion of the polishing target film and an impurity concentration in the central portion thereof to be different from each other, thereby modifying a surface of the polishing target film. The modified surface of the polishing target film is polished by a CMP method.Type: GrantFiled: March 10, 2015Date of Patent: June 26, 2018Assignee: Toshiba Memory CorporationInventors: Yukiteru Matsui, Kyoichi Suguro, Akifumi Gawase, Takahiko Kawasaki
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Publication number: 20180056482Abstract: According to one embodiment, a dresser includes a base metal plate, and a plurality of chip portions that are provided on the base metal plate. Each chip portion includes a Si substrate having a projection at an upper portion thereof and a diamond layer provided on the projection of the Si substrate.Type: ApplicationFiled: February 10, 2017Publication date: March 1, 2018Applicant: TOSHIBA MEMORY CORPORATIONInventors: Takahiko KAWASAKI, Yukiteru MATSUI, Akifumi GAWASE
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Publication number: 20180061654Abstract: In accordance with an embodiment, a manufacturing method of a semiconductor device includes bringing a first catalyst into contact with a workpiece to form an oxide film on a surface of the workpiece, and bringing a second catalyst different from the first catalyst and the oxide film into contact with each other or moving the second catalyst and the oxide film closer to each other to elute the oxide film into a treatment liquid.Type: ApplicationFiled: November 6, 2017Publication date: March 1, 2018Applicant: Toshiba Memory CorporationInventors: Akifumi Gawase, Yukiteru Matsui, Takahiko Kawasaki
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Publication number: 20170358711Abstract: Provided is a light emitting diode including: a columnar laminated structure 20 in which a first compound semiconductor layer 21, a light emitting layer 23 formed of a compound semiconductor, and a first portion 22A of a second compound semiconductor layer are laminated; a first electrode 31 electrically connected to the first compound semiconductor layer 21; and a second electrode 32. A second portion 22B of the second compound semiconductor layer is formed on the first portion 22A of the second compound semiconductor layer, apart from an edge portion 22a3 of the first portion 22A of the second compound semiconductor layer, the second electrode 32 is formed at least on a top surface of the second portion 22B of the second compound semiconductor layer, and light is outputted at least from the top surface 22b1 and a side surface 22b2 of the second portion 22B of the second compound semiconductor layer.Type: ApplicationFiled: October 22, 2015Publication date: December 14, 2017Inventors: HIDEKAZU AOYAGI, TAKAHIRO ARAKIDA, TAKAHIKO KAWASAKI, KATSUTOSHI ITOU, MAKOTO NAKASHIMA
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Patent number: 9837279Abstract: In accordance with an embodiment, a manufacturing method of a semiconductor device includes bringing a first catalyst into contact with a workpiece to form an oxide film on a surface of the workpiece, and bringing a second catalyst different from the first catalyst and the oxide film into contact with each other or moving the second catalyst and the oxide film closer to each other to elute the oxide film into a treatment liquid.Type: GrantFiled: March 10, 2016Date of Patent: December 5, 2017Assignee: Toshiba Memory CorporationInventors: Akifumi Gawase, Yukiteru Matsui, Takahiko Kawasaki
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Publication number: 20170250081Abstract: In a substrate processing method according to the embodiment, a first material is implanted into a surface of a target film to modify the surface of the target film. The surface of the target film is dissolved to remove the surface of the target film by bringing a catalytic material close to the surface of the target film or by contacting the catalytic material to the surface of the target film while supplying a process solution on the surface of the target film which has been modified.Type: ApplicationFiled: February 16, 2017Publication date: August 31, 2017Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Akifumi GAWASE, Yukiteru MATSUI, Takahiko KAWASAKI