Patents by Inventor Takahiko KISO

Takahiko KISO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230134246
    Abstract: A circuit board includes an insulating layer that is layered on a substrate; and a dam member in a form of a rectangular frame that is formed on the insulating layer. A corner part of the dam member includes a slope that slopes down from an inner wall surface to a surface of the insulating layer in a lower part that makes contact with the surface of the insulating layer; and a perpendicular part that is perpendicular to the surface of the insulating layer in an upper part separated from the surface of the insulating layer.
    Type: Application
    Filed: October 26, 2022
    Publication date: May 4, 2023
    Inventors: Hikaru Tanaka, Takahiko Kiso, Aya Mashima
  • Patent number: 11538750
    Abstract: A terminal structure includes a wiring layer, a protective insulation layer, an open portion, and a connection terminal. The protective insulation layer covers the wiring layer. The open portion extends through the protective insulation layer in a thickness-wise direction to expose part of an upper surface of the wiring layer. The connection terminal is formed on the wiring layer exposed from the open portion. The open portion includes a wall surface, a depression, and a projection. The wall surface extends downward from an upper surface of the protective insulation layer. The depression is depressed into the protective insulation layer from the wall surface toward an outer side of the open portion. The projection is formed under the depression, continuously with the depression, and projected from the depression into the open portion further inward than the wall surface in a plan view. The depression is filled with the connection terminal.
    Type: Grant
    Filed: April 20, 2021
    Date of Patent: December 27, 2022
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: Takahiko Kiso
  • Patent number: 11333443
    Abstract: A loop heat pipe includes an evaporator that vaporizes working fluid, a condenser that liquefies the working fluid vaporized by the evaporator, a liquid pipe connecting the condenser to the evaporator, and a vapor pipe connecting the evaporator to the condenser. The liquid pipe includes two wall portions located at opposite sides of the liquid pipe, two porous bodies, each of which is continuous with and formed integrally with one of the two wall portions, and a flow passage located between the two porous bodies.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: May 17, 2022
    Assignee: Shinko Electric Industries Co., LTD.
    Inventors: Koichi Tanaka, Nobuyuki Kurashima, Yoshihiro Machida, Takahiko Kiso
  • Patent number: 11193717
    Abstract: A loop heat pipe includes a metal layer stack of two outermost metal layers and intermediate metal layers stacked between the two outermost metal layers. The metal layer stack includes an evaporator, a condenser, a vapor pipe, a liquid pipe, and an inlet. The metal layer stack forms a flow passage that circulates the working fluid through the evaporator, the vapor pipe, the condenser, and the liquid pipe. At least one of the two outermost metal layers includes a thin wall portion that forms a portion of a wall of the vapor pipe in the flow passage.
    Type: Grant
    Filed: January 11, 2019
    Date of Patent: December 7, 2021
    Assignee: Shinko Electric Industries Co., LTD.
    Inventor: Takahiko Kiso
  • Patent number: 11171080
    Abstract: A wiring substrate includes a first insulation layer, an electronic component including a first surface and a second surface which is an opposite surface to the first surface, the electronic component being mounted on the first insulation layer with the first surface facing toward the first insulation layer, and a second insulation layer including a first layer and a second layer. The first layer is formed on the first insulation layer and configured to cover the second surface of the electronic component, and the second layer is stacked on the first layer. The first layer includes therein fillers. At least one of the fillers is in direct contact with the second surface of the electronic component at one side, and is exposed from the first layer and is thus in direct contact with the second layer at the other side.
    Type: Grant
    Filed: October 16, 2019
    Date of Patent: November 9, 2021
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Takahiko Kiso, Masahiro Kyozuka
  • Publication number: 20210335705
    Abstract: A terminal structure includes a wiring layer, a protective insulation layer, an open portion, and a connection terminal. The protective insulation layer covers the wiring layer. The open portion extends through the protective insulation layer in a thickness-wise direction to expose part of an upper surface of the wiring layer. The connection terminal is formed on the wiring layer exposed from the open portion. The open portion includes a wall surface, a depression, and a projection. The wall surface extends downward from an upper surface of the protective insulation layer. The depression is depressed into the protective insulation layer from the wall surface toward an outer side of the open portion. The projection is formed under the depression, continuously with the depression, and projected from the depression into the open portion further inward than the wall surface in a plan view. The depression is filled with the connection terminal.
    Type: Application
    Filed: April 20, 2021
    Publication date: October 28, 2021
    Inventor: Takahiko Kiso
  • Publication number: 20200126897
    Abstract: A wiring substrate includes a first insulation layer, an electronic component including a first surface and a second surface which is an opposite surface to the first surface, the electronic component being mounted on the first insulation layer with the first surface facing toward the first insulation layer, and a second insulation layer including a first layer and a second layer. The first layer is formed on the first insulation layer and configured to cover the second surface of the electronic component, and the second layer is stacked on the first layer. The first layer includes therein fillers. At least one of the fillers is in direct contact with the second surface of the electronic component at one side, and is exposed from the first layer and is thus in direct contact with the second layer at the other side.
    Type: Application
    Filed: October 16, 2019
    Publication date: April 23, 2020
    Inventors: Takahiko Kiso, Masahiro Kyozuka
  • Publication number: 20200096261
    Abstract: A loop heat pipe includes an evaporator that vaporizes working fluid, a condenser that liquefies the working fluid vaporized by the evaporator, a liquid pipe connecting the condenser to the evaporator, and a vapor pipe connecting the evaporator to the condenser. The liquid pipe includes two wall portions located at opposite sides of the liquid pipe, two porous bodies, each of which is continuous with and formed integrally with one of the two wall portions, and a flow passage located between the two porous bodies.
    Type: Application
    Filed: August 28, 2019
    Publication date: March 26, 2020
    Applicant: Shinko Electric Industries Co., LTD.
    Inventors: Koichi Tanaka, Nobuyuki Kurashima, Yoshihiro Machida, Takahiko Kiso
  • Patent number: 10495386
    Abstract: A loop heat pipe includes a stacked structure formed by metal layers that are stacked, including an outermost metal layer arranged at one outermost surface of the loop heat pipe. The stacked structure forms an evaporator configured to vaporize a working fluid and generate vapor, a condenser configured to liquefy the vapor of the working fluid, a vapor pipe configured to connect the evaporator and the condenser, and a liquid pipe configured to connect the evaporator and the condenser, to form a loop-shaped passage. The outermost metal layer has an outer surface formed with grooves.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: December 3, 2019
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Takahiko Kiso, Nobuyuki Kurashima
  • Publication number: 20190234692
    Abstract: A loop heat pipe includes a metal layer stack of two outermost metal layers and intermediate metal layers stacked between the two outermost metal layers. The metal layer stack includes an evaporator, a condenser, a vapor pipe, a liquid pipe, and an inlet. The metal layer stack forms a flow passage that circulates the working fluid through the evaporator, the vapor pipe, the condenser, and the liquid pipe. At least one of the two outermost metal layers includes a thin wall portion that forms a portion of a wall of the vapor pipe in the flow passage.
    Type: Application
    Filed: January 11, 2019
    Publication date: August 1, 2019
    Applicant: Shinko Electric Industries Co., Ltd.
    Inventor: Takahiko Kiso
  • Publication number: 20190204017
    Abstract: A loop heat pipe includes a stacked structure formed by metal layers that are stacked, including an outermost metal layer arranged at one outermost surface of the loop heat pipe. The stacked structure forms an evaporator configured to vaporize a working fluid and generate vapor, a condenser configured to liquefy the vapor of the working fluid, a vapor pipe configured to connect the evaporator and the condenser, and a liquid pipe configured to connect the evaporator and the condenser, to form a loop-shaped passage. The outermost metal layer has an outer surface formed with grooves.
    Type: Application
    Filed: November 28, 2018
    Publication date: July 4, 2019
    Inventors: Takahiko KISO, Nobuyuki KURASHIMA
  • Publication number: 20190013263
    Abstract: A wiring board, includes a core substrate that includes first pads for mounting a semiconductor chip, second pads provided at the periphery of the first pads, and a solder resist layer that selectively exposes the first pads and the second pads; a first insulation layer, formed on the solder resist layer, including an opening to be formed in a frame shape such that to expose the first pads and cover the second pads; and external connection terminals penetrating the first insulation layer to be electrically connected to the second pads, respectively, and partially exposed from the first insulation layer, wherein the core substrate includes a second insulation layer, wherein the first pads, the second pads and the solder resist layer are directly formed on the second insulation layer, and wherein a rim of an inner wall surface of the opening at the core substrate side contacts the solder resist layer.
    Type: Application
    Filed: June 21, 2018
    Publication date: January 10, 2019
    Inventors: Masahiro KYOZUKA, Takahiko KISO