Abstract: A program generation unit that generates voltage value information for making an LSI run on an operating voltage value based on a voltage context, wherein the program generation unit is provided with: a first compiler configured to compile a source program and that generate an object including a command sequence; a second compiler configured to generate the voltage value information based on a command density in the command sequence; and a linker configured to link the object with the voltage value information and that generates a user program.

Abstract: A program generation unit that generates voltage value information for making an LSI run on an operating voltage value based on a voltage context, wherein the program generation unit is provided with: a first compiler configured to compile a source program and that generate an object including a command sequence; a second compiler configured to generate the voltage value information based on a command density in the command sequence; and a linker configured to link the object with the voltage value information and that generates a user program.

Abstract: The present invention addresses the problem of providing an electroconductive composition which, even when burned in the air, can form an electroconductive film that exhibits satisfactory electroconductivity and moist-heat resistance. The problem is solved with an electroconductive composition which comprises: a surface-treated copper powder (AB) comprising a copper powder (A) and an ascorbic acid derivative (B) adherent to the surface thereof; a binder resin (C); and a dispersant (D) having an acidic group.

Abstract: An instruction fusion calculation device of the present invention includes an instruction fusion detection circuit, an instruction fusion circuit, and a calculator. The instruction fusion detection circuit determines whether or not a fusion of a preceding instruction and a subsequent instruction that have a flow dependence relationship between them can be made. The instruction fusion circuit fuses the preceding instruction and the subsequent instruction to which it is determined by the instruction fusion detection circuit that the instructions can be fused into one instruction. The calculator executes the fused instruction into which the instructions are fused by the instruction fusion circuit to output the calculation result and outputs at least one of the calculation results obtained by executing the preceding instruction and the subsequent instruction as an intermediate result.

Abstract: A division and square root arithmetic unit carries out a division operation of a higher radix and a square root extraction operation of a lower radix. A certain bit number (determined on the basis of a radix of an operation) of data selected from upper bits of the output of a carry save adder and the output of the adder are input to convert the data into twos complement representation data, and the twos complement representation data is shifted a certain bit number (determined on the basis of the radix of the operation) to use the shifted data for a partial remainder of the next digit. Hence, a large number of parts such as registers of a divisor and a partially extracted square root can be commonly used in a divider and a square root extractor to realize an effective and high performance arithmetic unit.

Abstract: An instruction fusion calculation device of the present invention includes an instruction fusion detection circuit, an instruction fusion circuit, and a calculator. The instruction fusion detection circuit determines whether or not a fusion of a preceding instruction and a subsequent instruction that have a flow dependence relationship between them can be made. The instruction fusion circuit fuses the preceding instruction and the subsequent instruction to which it is determined by the instruction fusion detection circuit that the instructions can be fused into one instruction. The calculator executes the fused instruction into which the instructions are fused by the instruction fusion circuit to output the calculation result and outputs at least one of the calculation results obtained by executing the preceding instruction and the subsequent instruction as an intermediate result.

Abstract: An ink composition containing an organic solvent and a pigment, which has a little amount of smell, excellent safety and health properties, excellent resin solubility, excellent printing stability and excellent drying properties, causes no corrosion to a printer, and is excellent in adhesion to non-absorbable printing media and good printability, wherein the ink composition comprises as the organic solvent at least one compound selected from compounds represented by the formulae (1) to (3), wherein each of R1, R2, R3, R4, R7 and R8 independently represents an alkylene group having 1 to 4 carbon atoms or an alkenylene group having 2 to 4 carbon atoms and each of R5, R6 and R9 independently represents a hydrogen atom or an alkyl group having 1 to 5 carbon atoms.

Abstract: According to the invention, there is provided a polymerizable composition which is cured by irradiation with a small amount of energy line, and offers excellent adhesiveness and transparency. The composition comprises an acid generator (A) containing a sulfonium cation and a borate anion represented by the following general formula (1), and a cationic polymerizable compound (B). General formula (1) [BYmZn]???general formula (1) Wherein, Y represents a fluorine or chlorine atom, Z represents a phenyl group substituted with two or more groups selected from a fluorine atom, cyano group, nitro group, and trifluoromethyl group, m represents an integer from 0 to 3, n represents an integer from 1 to 4, and m+n=4.

Abstract: An ink composition containing an organic solvent and a pigment, which has a little amount of smell, excellent safety and health properties, excellent resin solubility, excellent printing stability and excellent drying properties, causes no corrosion to a printer, and is excellent in adhesion to non-absorbable printing media and good printability, wherein the ink composition comprises as the organic solvent at least one compound selected from compounds represented by the formulae (1) to (3), wherein each of R1, R2, R3, R4, R7 and R8 independently represents an alkylene group having 1 to 4 carbon atoms or an alkenylene group having 2 to 4 carbon atoms and each of R5, R6 and R9 independently represents a hydrogen atom or an alkyl group having 1 to 5 carbon atoms.

Abstract: A division and square root arithmetic unit carries out a division operation of a higher radix and a square root extraction operation of a lower radix. A certain bit number (determined on the basis of a radix of an operation) of data selected from upper bits of the output of a carry save adder and the output of the adder are input to convert the data into twos complement representation data, and the twos complement representation data is shifted a certain bit number (determined on the basis of the radix of the operation) to use the shifted data for a partial remainder of the next digit. Hence, a large number of parts such as registers of a divisor and a partially extracted square root can be commonly used in a divider and a square root extractor to realize an effective and high performance arithmetic unit.

Abstract: A polymerizable composition comprising a polymerization initiator (A) represented by the formula (1) and a radical-polymerizable compound (B): (wherein R5, R6, R7, R8 and R9 are each independently a hydrogen atom, an alkyl, alkoxyl, hydroxyl or acyloxy group, a halogen atom, or —NR10R11, but at least one of them is —NR10R11; wherein R1, R2, R3, R4, R10 and R11 are each independently a hydrogen atom, or an alkyl or aryl group; and Z? is an arbitrary anion).

Abstract: A polymerizable composition comprising a polymerization initiator (A) represented by the formula (1) and a radical-polymerizable compound (B):

Abstract: A cache device of the present invention has a path through which the desired data contained in block load data transferred from a main memory are delivered to a processing unit which required the desired data, even when cache access by an instruction for accessing the main memory results in a cache miss. This path is different from a path through which the desired data is read from a data array of the cache device when a cache hit occures. Namely, the path in question neither contains a path from the main memory to the data array nor a path from the data array to a general purpose register which the processing unit can refer to, and allows the desired data delivered from the main memory to be directly transmitted to the processing unit. The cache device, as soon as it finds the desired data out of block load data delivered from the main memory, writes them into the general purpose register by way of the path in question.

Abstract: An information processing apparatus includes a data control circuit, an information holding register, and a selector. The data control circuit has control information corresponding to instructions which can be simultaneously executed, and performs control, even if a result of a preceding instruction is not stored in a general register, so as to execute a subsequent instruction to update the same general register. The information holding register holds data determination information based on an instruction preceding a branch instruction immediately before the branch instruction is executed. The selector replaces data determination information, for an instruction which is not executed when a branch is taken, with data determination information held by the information holding register.

Abstract: In a data processing system, arithmetic/logic units, each with a different number stages, are pipelined for executing arithmetic/logic instructions stored in main memory in full machine cycles. One of the outputs of the arithmetic/logic units is selected. In response to a memory access instruction, data is fetched from the main memory and stored into general registers in which the results of instruction execution from the arithmetic/logic units are also stored. A selector has a first input terminal which receives the selected output of the arithmetic/logic units, a second input terminal for receiving the fetched data, and an output terminal coupled to the general registers. In response to half machine clock pulses, the selector alternately establishes a first path between the first input terminal and the output terminal and a second path between the second input terminal and the output terminal during mutually exclusive times of half machine cycle.

Abstract: In an information processing device for use in indicating an operation number of floating point operation elements, such as either vector elements of each vector instruction or scalar instructions, the floating point operation elements are successively counted by an adder and a register to produce operation number signals representative of the results of counting. The operation number signals are periodically read out of the register as preceding and following operation number signals at preceding and following ones of periodical signals sent as a time signal from a digital timer, respectively, and are held in registers. A subtracter subtracts the preceding operation number from the following operation number to calculate a difference signal between the preceding and the following operation numbers and to provide the operation number per unit time. The difference signal is visually displayed on a display unit in real time.