Abstract: A low noise amplifier includes: first and seventh transistors configured to respectively receive first and second input signals; second, third, and fifth transistors connected to the first transistor; eighth, ninth, and eleventh transistors connected to the seventh transistor; a third resistive element; fourth and tenth transistors respectively connected to the third and ninth transistors; sixth and twelfth transistors respectively connected to second and first output terminals; and first and second resistive elements.

Abstract: A low noise amplifier includes: first and seventh transistors configured to respectively receive first and second input signals; second, third, and fifth transistors connected to the first transistor; eighth, ninth, and eleventh transistors connected to the seventh transistor; a third resistive element; fourth and tenth transistors respectively connected to the third and ninth transistors; sixth and twelfth transistors respectively connected to second and first output terminals; and first and second resistive elements.

Abstract: In a parameter correction circuit in an LSI, a reference resistor element with high precision having a resistance value set to a target value is connected to an external terminal of the LSI. A constant current from a mirror circuit connected to a current supply flows through the reference resistor element. A voltage value generated in the reference resistor element is measured by a voltage measuring circuit. The constant current also flows through a variable resistor element. The resistance value of the variable resistor element is adjusted so that a voltage generated in the variable resistor element corresponds to the voltage generated by the reference resistor element.

Abstract: In a parameter correction circuit in an LSI, a reference resistor element with high precision having a resistance value set to a target value is connected to an external terminal of the LSI. A constant current from a mirror circuit connected to a current supply flows through the reference resistor element. A voltage value generated in the reference resistor element is measured by a voltage measuring circuit. The constant current also flows through a variable resistor element. The resistance value of the variable resistor element is adjusted so that a voltage generated in the variable resistor element corresponds to the voltage generated by the reference resistor element.

Abstract: In a parameter correction circuit in an LSI, a reference resistor element with high precision having a resistance value set to a target value is connected to an external terminal of the LSI. A constant current from a mirror circuit connected to a current supply flows through the reference resistor element. A voltage value generated in the reference resistor element is measured by a voltage measuring circuit. The constant current also flows through a variable resistor element. The resistance value of the variable resistor element is adjusted so that a voltage generated in the variable resistor element corresponds to the voltage generated by the reference resistor element.

Abstract: In a parameter correction circuit in an LSI, a reference resistor element with high precision having a resistance value set to a target value is connected to an external terminal of the LSI. A constant current from a mirror circuit connected to a current supply flows through the reference resistor element. A voltage value generated in the reference resistor element is measured by a voltage measuring circuit. The constant current also flows through a variable resistor element. The resistance value of the variable resistor element is adjusted so that a voltage generated in the variable resistor element corresponds to the voltage generated by the reference resistor element.

Abstract: In a parameter correction circuit in an LSI, a reference resistor element with high precision having a resistance value set to a target value is connected to an external terminal of the LSI. A constant current from a mirror circuit connected to a current supply flows through the reference resistor element. A voltage value generated in the reference resistor element is measured by a voltage measuring circuit. The constant current also flows through a variable resistor element. The resistance value of the variable resistor element is adjusted so that a voltage generated in the variable resistor element corresponds to the voltage generated by the reference resistor element.

Abstract: A differential output circuit which performs data transmission by means of a differential current comprises: a first current source for outputting an electric current to the outside of the circuit; a second current source for introducing an electric current from the outside of the circuit; an output polarity switching circuit for switching the polarity of the differential current generated by the first and second current sources; a voltage source for supplying a predetermined voltage; and a resistor connected between a predetermined node and the voltage source, the predetermined node being interposed between the first and second current sources.

Abstract: An oscillation circuit comprises a plurality of constant current supplies for outputting a constant current according to a voltage supplied from a control current terminal; a plurality of switching elements which are charged or discharged by the constant current outputted from the constant current supplies and are turned on or off when exceeding a predetermined threshold voltage; and restriction elements for restricting a charging target voltage or a discharging target voltage at nodes between the constant current supplies and the switching elements to a constant value.

Abstract: In a parameter correction circuit to be included in an LSI, a reference resistor element with high precision having a resistance value set to a target value is connected to the external terminal of the LSI. A constant current I1 is allowed to flow from a mirror circuit connected to a current supply to the reference resistor element so that a voltage value generated in the reference resistor element is measured by a voltage measuring circuit. Next, a constant current I1 is allowed to flow in the same manner from the mirror circuit to a variable resistor element to be adjusted and corrected, and at this time, the resistance value of the variable resistor element is adjusted so that a voltage generated in the variable resistor element is allowed to correspond to the voltage generated in the reference resistor element.

Abstract: A recording clock generation circuit includes a first phase comparator for detecting a phase difference between a wobble signal and a PLL internal signal; a first filter for smoothing an output from the first phase comparator; a VCO circuit for oscillating in accordance with the output smoothed by the first filter; a frequency divider for dividing a frequency of an output from the VCO circuit; a phase adjusting circuit for adjusting a phase of an output from the frequency divider; and a second phase comparator for detecting a phase difference between the wobble signal and a pre-pit signal, and outputting the phase difference to the phase adjusting circuit.

Abstract: The successive comparison analog-to-digital (A-D) converter includes a plurality of capacitors, a plurality of first analog switches, a plurality of second analog switches, a plurality of third analog switches, a voltage comparator, and a state controller. Each of the plurality of capacitors has a capacitance weighted with a prescribed weighting factor. Each of the plurality of first analog switches has an on-state resistance weighted with a prescribed weighting factor. In the successive comparison A-D converter, a first analog switch corresponding to a capacitor having a capacitance weighted with a larger weighting factor has an on-state resistance weighted with a smaller weighting factor, whereby a time constant for this capacitor can be reduced. As a result, the difference in time constant between the capacitors is reduced. This enables reduction in time required to precharge (sample and hold) an analog input, improving the A-D conversion speed.

Abstract: A recording clock generation circuit includes a first phase comparator for detecting a phase difference between a wobble signal and a PLL internal signal; a first filter for smoothing an output from the first phase comparator; a VCO circuit for oscillating in accordance with the output smoothed by the first filter; a frequency divider for dividing a frequency of an output from the VCO circuit; a phase adjusting circuit for adjusting a phase of an output from the frequency divider; and a second phase comparator for detecting a phase difference between the wobble signal and a pre-pit signal, and outputting the phase difference to the phase adjusting circuit.

Abstract: A jitter detector obtains a phase difference between input signals as a digital value to make jitter between the signals easily detectable. The jitter detector includes comparison pulse generator, periodic signal generator, counter and arithmetic unit. The comparison pulse generator outputs one phase difference comparison pulse after another. Each phase difference comparison pulse has a width representing the phase difference between first and second input signals. The periodic signal generator outputs a periodic signal every time a value obtained by accumulating the widths of the phase difference comparison pulses exceeds a predetermined value. Receiving the periodic signal and a clock signal with a period shorter than that of the periodic signal, the counter counts the number of pulses of the clock signal during one period of the periodic signal and outputs a resultant count. And the arithmetic unit detects and outputs a variation in the count as jitter between the first and second input signals.

Abstract: The successive comparison analog-to-digital (A-D) converter includes a plurality of capacitors, a plurality of first analog switches, a plurality of second analog switches, a plurality of third analog switches, a voltage comparator, and a state controller. Each of the plurality of capacitors has a capacitance weighted with a prescribed weighting factor. Each of the plurality of first analog switches has an on-state resistance weighted with a prescribed weighting factor. In the successive comparison A-D converter, a first analog switch corresponding to a capacitor having a capacitance weighted with a larger weighting factor has an on-state resistance weighted with a smaller weighting factor, whereby a time constant for this capacitor can be reduced. As a result, the difference in time constant between the capacitors is reduced. This enables reduction in time required to precharge (sample and hold) an analog input, improving the A-D conversion speed.