Patents by Inventor Takahiro Hatano

Takahiro Hatano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11921162
    Abstract: According to one embodiment, the information processing device includes: a first state estimator configured to estimate a state of a target rechargeable battery based on: first data including a charge amount and voltage value of a rechargeable battery; information including a state of the rechargeable battery; and second data including a charge amount and voltage value of the rechargeable battery.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: March 5, 2024
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hisaaki Hatano, Takahiro Yamamoto, Kohei Maruchi, Kenichi Fujiwara, Masatake Sakuma
  • Publication number: 20230365013
    Abstract: A power supply system includes a power storage device; a power control device with a capacitor configured to be pre-charged with electric power from a power source other than the power storage device; a contact relay configured to electrically connect the power storage device and the power control device and disconnect a connection between the power storage device and the power control device, and a controller that sets a target voltage for a pre-charge of the capacitor in response to a system startup request and outputs a closing command for the contact relay in response to a completion of the pre-charge. The controller sets the target voltage to a value different from a voltage of the power storage device before or after an output of the closing command and determines a state of the contact relay based on a voltage of the capacitor after the output of the closing command.
    Type: Application
    Filed: April 18, 2023
    Publication date: November 16, 2023
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Takahiro HATANO
  • Patent number: 11594909
    Abstract: A control device of a power supply circuit includes processing circuitry. The processing circuitry includes a state-of-charge calculator and a target calculator. The state-of-charge calculator calculate a state of charge of the first battery. The target calculator calculates a target voltage range. When an output voltage of the first battery detected by a voltage sensor cannot be acquired and an acquisition failure occurs, after the occurrence of the acquisition failure, the state-of-charge calculator is configured to obtain the state of charge of the first battery, as a held state-of-charge, that was calculated before the occurrence of the acquisition failure. When a pre-charge process is performed in a state in which the acquisition failure is occurring, the target calculator is configured to calculate an estimated output voltage of the first battery from the held state-of-charge and calculate the target voltage range based on the estimated output voltage.
    Type: Grant
    Filed: March 22, 2021
    Date of Patent: February 28, 2023
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Takahiro Hatano
  • Patent number: 11451479
    Abstract: A network load balancing apparatus has a data buffer provided to each communication path of transfer destinations of a received packet and being associated with a virtual function, determines a destination virtual function based on a field value of the received packet, determines a communication path of a transfer destination of a packet to be subject to priority control based on a first hash value calculated using the field value, determines a communication path of a transfer destination of a packet to be subject to load balancing control, to match a preset load balancing situation of the data buffer, based on a second hash value based on the first hash value, and transmits the packet to a data buffer corresponding to the destination virtual function and the communication path of the transfer destination.
    Type: Grant
    Filed: July 5, 2019
    Date of Patent: September 20, 2022
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Saki Hatta, Shoko Oteru, Tomoaki Kawamura, Koji Yamazaki, Takahiro Hatano
  • Patent number: 11321255
    Abstract: A packet processing apparatus includes a line adapter configured to receive packets from a communication line, a packet combining unit configured to generate a combined packet by combining a plurality of packets received from the communication line, a packet memory configured to store packets received from the communication line, and a combined packet transferring unit configured to DMA transfer the combined packet generated by the packet combining unit to the packet memory. The combined packet transferring unit determines an address of start data of each packet inside the combined packet on the packet memory, writes information on the address into the descriptor that is a predetermined data area on a memory, and DMA transfers the combined packet to the packet memory.
    Type: Grant
    Filed: May 13, 2019
    Date of Patent: May 3, 2022
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Tomoaki Kawamura, Saki Hatta, Shoko Oteru, Koji Yamazaki, Takahiro Hatano
  • Publication number: 20210359533
    Abstract: A controller includes a voltage increasing unit and a pre-charge controlling unit. The voltage increasing unit stops a voltage increasing operation of a converter based on a converter controlling signal delivered from the pre-charge controlling unit. After the charged voltage of the capacitor shifts from an increase to a decrease in response to stopping of the voltage increasing operation of the converter, the pre-charge controlling unit refrains from switching a relay when a charged voltage of a capacitor is out of a target voltage range, and establishes an electrical connection of the relay when the charged voltage of the capacitor becomes a value within a target voltage range.
    Type: Application
    Filed: April 13, 2021
    Publication date: November 18, 2021
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Takahiro HATANO
  • Publication number: 20210336467
    Abstract: A control device of a power supply circuit includes processing circuitry. The processing circuitry includes a state-of-charge calculator and a target calculator. The state-of-charge calculator calculate a state of charge of the first battery. The target calculator calculates a target voltage range. When an output voltage of the first battery detected by a voltage sensor cannot be acquired and an acquisition failure occurs, after the occurrence of the acquisition failure, the state-of-charge calculator is configured to obtain the state of charge of the first battery, as a held state-of-charge, that was calculated before the occurrence of the acquisition failure. When a pre-charge process is performed in a state in which the acquisition failure is occurring, the target calculator is configured to calculate an estimated output voltage of the first battery from the held state-of-charge and calculate the target voltage range based on the estimated output voltage.
    Type: Application
    Filed: March 22, 2021
    Publication date: October 28, 2021
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Takahiro HATANO
  • Publication number: 20210281516
    Abstract: A network load balancing apparatus has a data buffer provided to each communication path of transfer destinations of a received packet and being associated with a virtual function, determines a destination virtual function based on a field value of the received packet, determines a communication path of a transfer destination of a packet to be subject to priority control based on a first hash value calculated using the field value, determines a communication path of a transfer destination of a packet to be subject to load balancing control, to match a preset load balancing situation of the data buffer, based on a second hash value based on the first hash value, and transmits the packet to a data buffer corresponding to the destination virtual function and the communication path of the transfer destination.
    Type: Application
    Filed: July 5, 2019
    Publication date: September 9, 2021
    Inventors: Saki Hatta, Shoko Oteru, Tomoaki Kawamura, Koji Yamazaki, Takahiro Hatano
  • Publication number: 20210141751
    Abstract: A packet processing apparatus includes a line adapter configured to receive packets from a communication line, a packet combining unit configured to generate a combined packet by combining a plurality of packets received from the communication line, a packet memory configured to store packets received from the communication line, and a combined packet transferring unit configured to DMA transfer the combined packet generated by the packet combining unit to the packet memory. The combined packet transferring unit determines an address of start data of each packet inside the combined packet on the packet memory, writes information on the address into the descriptor that is a predetermined data area on a memory, and DMA transfers the combined packet to the packet memory.
    Type: Application
    Filed: May 13, 2019
    Publication date: May 13, 2021
    Applicant: Nippon Telegraph and Telephone Corporation
    Inventors: Tomoaki Kawamura, Saki Hatta, Shoko Oteru, Koji Yamazaki, Takahiro Hatano
  • Publication number: 20210034559
    Abstract: A packet processing device includes: a line adapter configured to receive packets from a communication line; a packet combining unit configured to generate a combined packet by combining a plurality of packets received from the communication line; a packet memory configured to store packets received from the communication line; and a combined packet transferring unit configured to DMA transfer the combined packet generated by the packet combining unit to the packet memory. The combined packet transferring unit writes information of an address of first data of each packet inside the combined packet on the packet memory into a descriptor that is a data area on a memory set in advance.
    Type: Application
    Filed: March 28, 2019
    Publication date: February 4, 2021
    Inventors: Tomoaki Kawamura, Saki Hatta, Shoko Oteru, Koji Yamazaki, Takahiro Hatano
  • Patent number: 7673145
    Abstract: This invention includes an image quality priority level decision processing unit (40) which evaluates the magnitude of an image quality of each of a plurality of first image data formed from biometric images associated with the same target on the basis of a specific index having the relationship of a monotone function with authentication accuracy of biometric authentication, and outputs each of the first image data upon adding a priority level thereto on the basis of the evaluation result, a first image storage (6, 81) unit which stores each of the first image data having a priority level added thereto from the image quality priority level decision processing unit (40), a second image storage unit (8, 61) which stores second image data used for comparison/collation with the first image data, an image collation unit (7) which compares/collates the second image data stored in the second image storage unit (8, 61) with the first image data stored in the first image storage unit (6, 81) and outputs the comparison
    Type: Grant
    Filed: March 5, 2004
    Date of Patent: March 2, 2010
    Assignee: Nippon Telephone and Telegraph Corporation
    Inventors: Takahiro Hatano, Satoshi Shigematsu, Hiroki Morimura, Namiko Ikeda, Yukio Okazaki, Katsuyuki Machida, Mamoru Nakanishi
  • Patent number: 7606399
    Abstract: A sensor cell includes a sensor electrode (101) formed on a substrate (100), a signal output unit (16) which outputs a signal corresponding to a capacitance (Cf) formed between the sensor electrode and the surface of a finger (3), a high-sensitivity electrode (103) formed on the substrate so as to be insulated and isolated from the sensor electrode, and a potential controller (14) which controls the potential of the finger surface via a capacitance (Cc) formed between the high-sensitivity electrode and the finger surface by controlling the potential of the high-sensitivity electrode. In this arrangement, when the resistance of the finger is high, the potential of the finger surface can be controlled so as not to fluctuate with the potential change of the sensor electrode.
    Type: Grant
    Filed: July 15, 2005
    Date of Patent: October 20, 2009
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Hiroki Morimura, Mamoru Nakanishi, Satoshi Shigematsu, Takahiro Hatano, Yukio Okazaki, Katsuyuki Machida
  • Patent number: 7544067
    Abstract: A board mount-type connector having an insulative housing with a base and a row of contacts carried by the housing is disclosed. Each contact has a centerpiece secured to the housing along a substantially vertically upright inner wall of the base, a mating interface connected to one end of the centerpiece so that the mating interface contacts a mating contact, and a board interface connected to the remaining end of the centerpiece so that the board interface connects to a circuit board. Each board interface has a bend that initially extends away from an extension line associated with a generally vertically upright portion of the respective centerpiece and that is bent back toward the extension line. A pad interface extends from the free end of the board interface toward the extension line and the contacts of the row are staggered along a length of the row.
    Type: Grant
    Filed: February 29, 2008
    Date of Patent: June 9, 2009
    Assignees: Tyco Electronics AMP K.K., Advantest Corporation
    Inventors: Takahiro Hatano, Makiya Kimura, Tomoyuki Takamoto, Shin Sakiyama, Takashi Sekizuka
  • Publication number: 20080056543
    Abstract: A sensor cell includes a sensor electrode (101) formed on a substrate (100), a signal output unit (16) which outputs a signal corresponding to a capacitance (Cf) formed between the sensor electrode and the surface of a finger (3), a high-sensitivity electrode (103) formed on the substrate so as to be insulated and isolated from the sensor electrode, and a potential controller (14) which controls the potential of the finger surface via a capacitance (Cc) formed between the high-sensitivity electrode and the finger surface by controlling the potential of the high-sensitivity electrode. In this arrangement, when the resistance of the finger is high, the potential of the finger surface can be controlled so as not to fluctuate with the potential change of the sensor electrode.
    Type: Application
    Filed: July 15, 2005
    Publication date: March 6, 2008
    Inventors: Hiroki Morimura, Mamoru Nakanishi, Satoshi Shigematsu, Takahiro Hatano, Yukio Okazaki, Katsuyuki Machida
  • Patent number: 7187785
    Abstract: An image processing apparatus includes an image correcting section. When an image of an object is input, the image correcting section performs correction processing for the input image including the object image and outputs the corrected image as an image required for authentication of the object. An image processing method is also disclosed.
    Type: Grant
    Filed: August 27, 2002
    Date of Patent: March 6, 2007
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Namiko Ikeda, Mamoru Nakanishi, Koji Fujii, Takahiro Hatano, Satoshi Shigematsu, Hiroki Morimura, Yukio Okazaki, Hakaru Kyuragi
  • Patent number: D581876
    Type: Grant
    Filed: February 29, 2008
    Date of Patent: December 2, 2008
    Assignees: Tyco Electronics AMP K.K., Advantest Corporation
    Inventors: Takahiro Hatano, Makiya Kimura, Tomoyuki Takamoto, Shin Sakiyama, Takashi Sekizuka
  • Patent number: D583769
    Type: Grant
    Filed: February 29, 2008
    Date of Patent: December 30, 2008
    Assignees: Tyco Electronics AMP K.K., Advantest Corporation
    Inventors: Takahiro Hatano, Makiya Kimura, Tomoyuki Takamoto, Shin Sakiyama, Takashi Sekizuka
  • Patent number: D584693
    Type: Grant
    Filed: February 29, 2008
    Date of Patent: January 13, 2009
    Assignees: Tyco Electronics AMP K.K., Advantest Corporation
    Inventors: Takahiro Hatano, Makiya Kimura, Tomoyuki Takamoto, Shin Sakiyama, Takashi Sekizuka
  • Patent number: D597951
    Type: Grant
    Filed: February 29, 2008
    Date of Patent: August 11, 2009
    Assignees: Tyco Electronics AMP K.K., Advantest Corporation
    Inventors: Takahiro Hatano, Makiya Kimura, Tomoyuki Takamoto, Shin Sakiyama, Takashi Sokizuka
  • Patent number: D722630
    Type: Grant
    Filed: March 4, 2014
    Date of Patent: February 17, 2015
    Assignee: Honda Motor Co., Ltd.
    Inventor: Takahiro Hatano