Patents by Inventor Takahiro Hoshiko

Takahiro Hoshiko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5979480
    Abstract: An object is to obtain a semiconductor production device, a method of adjusting its internal pressure and a method of processing an object of processing which can prevent adhesion of particles to an object of processing. The amount of gas in a cassette chamber (1) is adjusted to bring the internal pressure in the cassette chamber (1) close to atmospheric pressure. Next, on the basis of the pressure difference between atmospheric pressure and the internal pressure gas is gradually moved through gas discharge means (Ta, V13, Tb, Tc) between the atmosphere and the cassette chamber (1) so that the internal pressure becomes equal to the atmospheric pressure. Then a gate (G1) is opened/closed to convey an object of processing between the cassette chamber (1) and the atmosphere. Hence, no flow of gas is caused between the processing chamber and the atmosphere when the gate (G1) is opened/closed, which prevents adhesion of particles to the object of processing.
    Type: Grant
    Filed: September 25, 1997
    Date of Patent: November 9, 1999
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Takahiro Hoshiko
  • Patent number: 5541127
    Abstract: Disclosed are a semiconductor device having a sidewall insulating film free from the formation of fence-shaped residue when a conductive layer formed on the sidewall insulating film is anisotropically etched by means of plasma etching, and a method of forming the sidewall insulating film. The method of forming the sidewall insulating film includes the steps of isotropically etching an insulating film 4 formed on a polycrystalline silicon film 3 to be a gate electrode as much as a prescribed thickness, using resist as a mask, anisotropically etching the remaining part of insulating film 4 and polycrystalline silicon film 3, forming an insulating film 6 entirely over the surface, and forming a sidewall insulating film 6a on the side plane of polycrystalline silicon film 3. The resultant sidewall insulating film 6a has a cross-section reduced upwardly in width.
    Type: Grant
    Filed: May 15, 1995
    Date of Patent: July 30, 1996
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Takahiro Hoshiko, Toshiaki Ogawa
  • Patent number: 5435886
    Abstract: A method of electron cyclotron resonance plasma etching including generating a constant plasma in a gas in a chamber containing a semiconductor wafer by supplying microwave energy to the chamber continuously and applying a pulsed direct current bias to the semiconductor wafer, wherein the pulsed bias has a period substantially equal to a time constant determined by the capacitance of the semiconductor wafer and the resistance of an ion sheath at the surface of the semiconductor wafer.
    Type: Grant
    Filed: May 23, 1994
    Date of Patent: July 25, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Nobuo Fujiwara, Takahiro Maruyama, Kenji Kawai, Takahiro Hoshiko
  • Patent number: 5432367
    Abstract: A semiconductor device having a substrate, a conductive layer formed on the substrate, an upper insulting film formed on the upper surface of the conductive layer and having a sectional shape with its width reduced upwardly, and a sidewall insulating film formed on the sidewall of the conductive layer and the upper insulating film having a sectional shape with its width reduced upwardly. The shape of the upper insulating film and, particularly, the sidewall insulating film prevent a polycrystalline silicon film formed on the upper insulating film and the sidewall insulating film from having a surface in the vertical direction relative to the substrate. Consequently, the disconnection of an upper layer interconnection can be effectively prevented, and miniaturization of elements can be achieved without forming fence-shaped residue when a conductive layer formed on the sidewall insulating film is anisotropically etched by plasma etching.
    Type: Grant
    Filed: May 19, 1994
    Date of Patent: July 11, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Takahiro Hoshiko, Toshiaki Ogawa