Patents by Inventor Takahiro Iguchi
Takahiro Iguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240137565Abstract: A three-dimensional data decoding method includes: selecting, from among contexts, a first context for an encoded first information item to be processed; and arithmetic-decoding the encoded first information item to be processed, using the first context, to generate a first information item to be processed. Encoded first information items including the encoded first information item to be processed are included in a bitstream generated by encoding an information item about positions of three-dimensional points. The encoded first information items are generated by arithmetic-encoding first information items including the first information item to be processed. The first information items each correspond to a different one of reference positions and indicate whether a three-dimensional point corresponding to a reference position corresponding to the first information item is present.Type: ApplicationFiled: November 29, 2023Publication date: April 25, 2024Inventors: Takahiro NISHI, Toshiyasu SUGIO, Noritaka IGUCHI
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Publication number: 20240135598Abstract: A three-dimensional data decoding method includes: performing at least one of: a first process including: determining a first context based on first information identifying a first point cloud including a first prediction point that is referred to for calculating a predicted value of a first three-dimensional point according to inter prediction; and arithmetic-decoding, using the first context determined, second information identifying the first prediction point; or a second process including: determining a second context based on at least one of the first information or the second information; and arithmetic-decoding, using the second context determined, a prediction residual of the first three-dimensional point.Type: ApplicationFiled: January 2, 2024Publication date: April 25, 2024Inventors: Takahiro NISHI, Toshiyasu SUGIO, Noritaka IGUCHI
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Publication number: 20240129530Abstract: An encoding method for encoding three-dimensional points each having a position represented by a distance and an angle, the encoding method comprising: identifying three-dimensional points that belong to a second processing unit and have been encoded, for inter prediction of a first three-dimensional point belonging to a first processing unit; and selecting a reference three-dimensional point from the three-dimensional points identified to calculate an inter predicted value of the first three-dimensional point. The three-dimensional points identified include a second three-dimensional point and a third three-dimensional point, the second three-dimensional point having a second angle corresponding to a first angle of the first three-dimensional point, the third three-dimensional point having a third angle greater than the second angle.Type: ApplicationFiled: December 22, 2023Publication date: April 18, 2024Inventors: Takahiro NISHI, Toshiyasu SUGIO, Noritaka IGUCHI, Chung Dean HAN, Keng Liang LOI, Zheng WU
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Patent number: 11954276Abstract: A touch panel including an oxide semiconductor film having conductivity is provided. The touch panel includes a transistor, a second insulating film, and a touch sensor. The transistor includes a gate electrode; a gate insulating film; a first oxide semiconductor film; a source electrode and a drain electrode; a first insulating film; and a second oxide semiconductor film. The second insulating film is over the second oxide semiconductor film so that the second oxide semiconductor film is positioned between the first insulating film and the second insulating film. The touch sensor includes a first electrode and a second electrode. One of the first and second electrodes includes the second oxide semiconductor film.Type: GrantFiled: May 11, 2021Date of Patent: April 9, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hajime Kimura, Masami Jintyou, Yasuharu Hosaka, Naoto Goto, Takahiro Iguchi, Daisuke Kurosaki, Junichi Koezuka
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Publication number: 20240104782Abstract: A three-dimensional data encoding method includes: encoding, for each of second units, information about positions of three-dimensional points included in a first unit, to generate encoded data items, the second units being smaller than the first unit that is an encoding unit; and outputting the encoded data items. Each of the encoded data items includes no individual additional information. The encoded data items include common additional information. The common additional information includes first information indicating a size of a first encoded data item included in the encoded data items.Type: ApplicationFiled: December 8, 2023Publication date: March 28, 2024Inventors: Takahiro NISHI, Toshiyasu Sugio, Noritaka Iguchi
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Publication number: 20240098313Abstract: A three-dimensional data encoding method includes: performing motion compensation on a plurality of encoded point clouds; merging the plurality of encoded point clouds that have been motion compensated to generate a reference point cloud; generating an N-ary tree structure of a current point cloud, where N is an integer greater than or equal to 2; and encoding the N-ary tree structure of the current point cloud using the reference point cloud.Type: ApplicationFiled: November 20, 2023Publication date: March 21, 2024Inventors: Takahiro Nishi, Toshiyasu SUGIO, oritaka IGUCHI
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Patent number: 11929412Abstract: A semiconductor device with favorable electrical characteristics is provided. A semiconductor device with stable electrical characteristics is provided. The semiconductor device includes a first insulating layer, a second insulating layer, a third insulating layer, a fourth insulating layer, a semiconductor layer, and a first conductive layer. The second insulating layer is positioned over the first insulating layer and the island-shaped semiconductor layer is positioned over the second insulating layer. The second insulating layer has an island shape having an end portion outside a region overlapping with the semiconductor layer. The fourth insulating layer covers the second insulating layer, the semiconductor layer, the third insulating layer, and the first conductive layer, is in contact with part of a top surface of the semiconductor layer, and is in contact with the first insulating layer outside the end portion of the second insulating layer.Type: GrantFiled: July 18, 2022Date of Patent: March 12, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Masami Jintyou, Takahiro Iguchi, Yukinori Shima, Kenichi Okazaki
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Publication number: 20240038898Abstract: A semiconductor device with favorable electrical characteristics is provided. A highly reliable semiconductor device is provided. A semiconductor device with stable electrical characteristics is provided. The semiconductor device includes a semiconductor layer, a gate insulating layer, agate electrode, a first insulating layer, a second insulating layer, and a conductive layer. The gate insulating layer is in contact with a top surface and a side surface of the semiconductor layer, and the gate electrode includes a region overlapping with the semiconductor layer with the gate insulating layer therebetween. The first insulating layer contains an inorganic material and is in contact with a top surface of the gate insulating layer and a top surface and a side surface of the gate electrode. The gate insulating layer and the first insulating layer include a first opening in a region overlapping with the semiconductor layer.Type: ApplicationFiled: December 1, 2021Publication date: February 1, 2024Inventors: Masami JINTYOU, Takahiro IGUCHI, Rai SATO
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Publication number: 20230320135Abstract: Provided is a semiconductor device having a high degree of integration, which includes first and second transistors and a first insulating layer. The first transistor includes a first semiconductor layer, a second insulating layer, and first to third conductive layers. The second transistor includes a second semiconductor layer, a third insulating layer, and fourth to sixth conductive layers. The first insulating layer includes a region in contact with the first semiconductor layer and the first conductive layer and includes an opening reaching the first conductive layer. The first semiconductor layer is in contact with a top surface of the first conductive layer, an inner wall of the opening, and the second conductive layer. The second conductive layer is positioned over the first insulating layer. The third conductive layer is positioned over the first semiconductor layer and includes a region overlapping with the inner wall of the opening with the second insulating layer positioned therebetween.Type: ApplicationFiled: March 28, 2023Publication date: October 5, 2023Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yasuharu HOSAKA, Masami JINTYOU, Takahiro IGUCHI, Chieko MISAMA, Ami SATO, Masayoshi DOBASHI
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Patent number: 11581427Abstract: A semiconductor device with favorable electrical characteristics is provided. A semiconductor device with stable electrical characteristics is provided. A highly reliable semiconductor device is provided. A semiconductor layer is formed, a gate insulating layer is formed over the semiconductor layer, a metal oxide layer is formed over the gate insulating layer, and a gate electrode which overlaps with part of the semiconductor layer is formed over the metal oxide layer. Then, a first element is supplied through the metal oxide layer and the gate insulating layer to a region of the semiconductor layer that does not overlap with the gate electrode. Examples of the first element include phosphorus, boron, magnesium, aluminum, and silicon. The metal oxide layer may be processed after the first element is supplied to the semiconductor layer.Type: GrantFiled: June 19, 2019Date of Patent: February 14, 2023Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Junichi Koezuka, Masami Jintyou, Takahiro Iguchi, Yasutaka Nakazawa
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Publication number: 20230020210Abstract: A semiconductor device with favorable electrical characteristics is provided. A semiconductor device having stable electrical characteristics is provided. The semiconductor device includes a semiconductor layer containing a metal oxide, a first insulating layer, a second insulating layer, a third insulating layer containing a nitride, and a first conductive layer. The first insulating layer includes a projecting first region that overlaps with the semiconductor layer and a second region that does not overlap with the semiconductor layer and is thinner than the first region. The second insulating layer is provided to cover a top surface of the second region, a side surface of the first region, and the semiconductor layer. The first conductive layer is provided over the second insulating layer and a bottom surface of the first conductive layer over the second region includes a portion positioned below a bottom surface of the semiconductor layer.Type: ApplicationFiled: September 21, 2022Publication date: January 19, 2023Inventors: Shunpei YAMAZAKI, Kenichi OKAZAKI, Masami JINTYOU, Takahiro IGUCHI, Yukinori SHIMA
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Publication number: 20220359691Abstract: A semiconductor device with favorable electrical characteristics is provided. A semiconductor device with stable electrical characteristics is provided. The semiconductor device includes a first insulating layer, a second insulating layer, a third insulating layer, a fourth insulating layer, a semiconductor layer, and a first conductive layer. The second insulating layer is positioned over the first insulating layer and the island-shaped semiconductor layer is positioned over the second insulating layer. The second insulating layer has an island shape having an end portion outside a region overlapping with the semiconductor layer. The fourth insulating layer covers the second insulating layer, the semiconductor layer, the third insulating layer, and the first conductive layer, is in contact with part of a top surface of the semiconductor layer, and is in contact with the first insulating layer outside the end portion of the second insulating layer.Type: ApplicationFiled: July 18, 2022Publication date: November 10, 2022Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei YAMAZAKI, Masami JINTYOU, Takahiro IGUCHI, Yukinori SHIMA, Kenichi OKAZAKI
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Patent number: 11482626Abstract: A semiconductor device with favorable electrical characteristics is provided. A semiconductor device having stable electrical characteristics is provided. The semiconductor device includes a semiconductor layer containing a metal oxide, a first insulating layer, a second insulating layer, a third insulating layer containing a nitride, and a first conductive layer. The first insulating layer includes a projecting first region that overlaps with the semiconductor layer and a second region that does not overlap with the semiconductor layer and is thinner than the first region. The second insulating layer is provided to cover a top surface of the second region, a side surface of the first region, and the semiconductor layer. The first conductive layer is provided over the second insulating layer and a bottom surface of the first conductive layer over the second region includes a portion positioned below a bottom surface of the semiconductor layer.Type: GrantFiled: March 15, 2019Date of Patent: October 25, 2022Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei Yamazaki, Kenichi Okazaki, Masami Jintyou, Takahiro Iguchi, Yukinori Shima
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Patent number: 11424334Abstract: A semiconductor device with favorable electrical characteristics is provided. A semiconductor device with stable electrical characteristics is provided. The semiconductor device includes a first insulating layer, a second insulating layer, a third insulating layer, a fourth insulating layer, a semiconductor layer, and a first conductive layer. The second insulating layer is positioned over the first insulating layer and the island-shaped semiconductor layer is positioned over the second insulating layer. The second insulating layer has an island shape having an end portion outside a region overlapping with the semiconductor layer. The fourth insulating layer covers the second insulating layer, the semiconductor layer, the third insulating layer, and the first conductive layer, is in contact with part of a top surface of the semiconductor layer, and is in contact with the first insulating layer outside the end portion of the second insulating layer.Type: GrantFiled: October 23, 2018Date of Patent: August 23, 2022Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Masami Jintyou, Takahiro Iguchi, Yukinori Shima, Kenichi Okazaki
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Patent number: 11282865Abstract: A change in electrical characteristics can be inhibited and reliability can be improved in a semiconductor device including an oxide semiconductor. The semiconductor device including an oxide semiconductor film includes a first insulating film, the oxide semiconductor film over the first insulating film, a second insulating film over the oxide semiconductor film, and a third insulating film over the second insulating film. The second insulating film includes oxygen and silicon, the third insulating film includes nitrogen and silicon, and indium is included in a vicinity of an interface between the second insulating film and the third insulating film.Type: GrantFiled: November 19, 2019Date of Patent: March 22, 2022Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kenichi Okazaki, Junichi Koezuka, Masami Jintyou, Takahiro Iguchi
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Patent number: 11271098Abstract: To provide a semiconductor device with favorable electrical characteristics. To provide a method for manufacturing a semiconductor device with high productivity. To reduce the temperatures in a manufacturing process of a semiconductor device. An island-like oxide semiconductor layer is formed over a first insulating film; a second insulating film and a first conductive film are formed in this order, covering the oxide semiconductor layer; oxygen is supplied to the second insulating film through the first conductive film; a metal oxide film is formed over the second insulating film in an atmosphere containing oxygen; a first gate electrode is formed by processing the metal oxide film; a third insulating film is formed, covering the first gate electrode and the second insulating film; and first heat treatment is performed. The second insulating film and the third insulating film each include oxide. The highest temperature in the above steps is 340° C. or lower.Type: GrantFiled: June 18, 2020Date of Patent: March 8, 2022Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yasuharu Hosaka, Takahiro Iguchi, Masami Jintyou, Takashi Hamochi, Junichi Koezuka
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Publication number: 20220013667Abstract: A semiconductor device with favorable electrical characteristics is provided. A highly reliable semiconductor device is provided. A semiconductor device with stable electrical characteristics is provided. The semiconductor device includes a semiconductor layer, a first insulating layer, a metal oxide layer, a conductive layer, and an insulating region. The first insulating layer covers a top surface and a side surface of the semiconductor layer, and the conductive layer is positioned over the first insulating layer. The metal oxide layer is positioned between the first insulating layer and the conductive layer, and an end portion of the metal oxide layer is positioned on an inner side than an end portion of the conductive layer. The insulating region is positioned adjacent to the metal oxide layer and positioned between the first insulating layer and the conductive layer. Furthermore, the semiconductor layer includes a first region, a pair of second regions, and a pair of third regions.Type: ApplicationFiled: October 21, 2019Publication date: January 13, 2022Inventors: Masataka NAKADA, Takahiro IGUCHI, Yasuharu HOSAKA, Takumi SHIGENOBU
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Publication number: 20220013545Abstract: Provided is a semiconductor device with high capacitance while the aperture ratio is increased or a semiconductor device whose manufacturing cost is low. The semiconductor device includes a transistor, a first insulating film, and a capacitor including a second insulating film between a pair of electrodes. The transistor includes a gate electrode, a gate insulating film in contact with the gate electrode, a first oxide semiconductor film overlapping with the gate electrode, and a source electrode and a drain electrode electrically connected to the first oxide semiconductor film. One of the pair of electrodes of the capacitor includes a second oxide semiconductor film. The first insulating film is over the first oxide semiconductor film. The second insulating film is over the second oxide semiconductor film so that the second oxide semiconductor film is between the first insulating film and the second insulating film.Type: ApplicationFiled: September 23, 2021Publication date: January 13, 2022Inventors: Kenichi OKAZAKI, Masami JINTYOU, Takahiro IGUCHI, Yasuharu HOSAKA, Junichi KOEZUKA, Hiroyuki MIYAKE, Shunpei YAMAZAKI
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Publication number: 20210278922Abstract: A touch panel including an oxide semiconductor film having conductivity is provided. The touch panel includes a transistor, a second insulating film, and a touch sensor. The transistor includes a gate electrode; a gate insulating film; a first oxide semiconductor film; a source electrode and a drain electrode; a first insulating film; and a second oxide semiconductor film. The second insulating film is over the second oxide semiconductor film so that the second oxide semiconductor film is positioned between the first insulating film and the second insulating film. The touch sensor includes a first electrode and a second electrode. One of the first and second electrodes includes the second oxide semiconductor film.Type: ApplicationFiled: May 11, 2021Publication date: September 9, 2021Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei YAMAZAKI, Hajime KIMURA, Masami JINTYOU, Yasuharu HOSAKA, Naoto GOTO, Takahiro IGUCHI, Daisuke KUROSAKI, Junichi KOEZUKA
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Patent number: 11036324Abstract: A touch panel including an oxide semiconductor film having conductivity is provided. The touch panel includes a transistor, a second insulating film, and a touch sensor. The transistor includes a gate electrode; a gate insulating film; a first oxide semiconductor film; a source electrode and a drain electrode; a first insulating film; and a second oxide semiconductor film. The second insulating film is over the second oxide semiconductor film so that the second oxide semiconductor film is positioned between the first insulating film and the second insulating film. The touch sensor includes a first electrode and a second electrode. One of the first and second electrodes includes the second oxide semiconductor film.Type: GrantFiled: March 26, 2020Date of Patent: June 15, 2021Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hajime Kimura, Masami Jintyou, Yasuharu Hosaka, Naoto Goto, Takahiro Iguchi, Daisuke Kurosaki, Junichi Koezuka