Patents by Inventor Takahiro Kamei

Takahiro Kamei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230395636
    Abstract: To provide a solid-state imaging device capable of further improving quality and reliability of the solid-state imaging device. Provided is a solid-state imaging device including: a first substrate; a second substrate laminated on the first substrate by direct bonding on a side opposite to a light incident side of the first substrate, the second substrate having a size different from a size of the first substrate; a third substrate provided on a side opposite to a light incident side of the second substrate; and an insulating layer formed between the first substrate and the third substrate, in which the third substrate includes a well formed on a light incident side of the third substrate.
    Type: Application
    Filed: September 15, 2021
    Publication date: December 7, 2023
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Kentaro AKIYAMA, Tatsumasa HIRATSUKA, Takahiro KAMEI, Yosuke NITTA
  • Publication number: 20230060413
    Abstract: Provided is a semiconductor device having high planarity in an in-plane direction. This semiconductor device includes a semiconductor substrate, a first plating film pattern, a second plating film pattern, and an insulating layer. The semiconductor substrate has a first surface, and a second surface on a side opposite to the first surface. The first plating film pattern includes a first portion that covers a first regional portion of the first surface, and a second portion that is stacked to cover a portion of the first portion. The second plating film pattern includes a third portion that covers a second regional portion different from the first regional portion of the first surface, and also includes a fourth portion that is stacked to cover a portion of the third portion. A portion between the second portion and the fourth portion is filled with the insulating layer.
    Type: Application
    Filed: October 13, 2022
    Publication date: March 2, 2023
    Inventors: TAKAHIRO KAMEI, YOICHI OOTSUKA
  • Patent number: 11488893
    Abstract: Provided is a semiconductor device having high planarity in an in-plane direction. This semiconductor device includes a semiconductor substrate, a first plating film pattern, a second plating film pattern, and an insulating layer. The semiconductor substrate has a first surface, and a second surface on a side opposite to the first surface. The first plating film pattern includes a first portion that covers a first regional portion of the first surface, and a second portion that is stacked to cover a portion of the first portion. The second plating film pattern includes a third portion that covers a second regional portion different from the first regional portion of the first surface, and also includes a fourth portion that is stacked to cover a portion of the third portion. A portion between the second portion and the fourth portion is filled with the insulating layer.
    Type: Grant
    Filed: February 18, 2019
    Date of Patent: November 1, 2022
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Takahiro Kamei, Yoichi Ootsuka
  • Publication number: 20220139978
    Abstract: An imaging element according to an embodiment of the present disclosure includes: a semiconductor substrate having an effective pixel region in which a plurality of pixels is disposed and a peripheral region provided around the effective pixel region; a photoelectric converter; a first hydrogen block layer; an interlayer insulating layer; and a separation groove. The photoelectric converter includes a first electrode, a second electrode, and an electric charge accumulation layer and a photoelectric conversion layer. The first electrode is provided on a light receiving surface side of the semiconductor substrate and includes a plurality of electrodes. The second electrode is disposed to be opposed to the first electrode. The electric charge accumulation layer and the photoelectric conversion layer are stacked and provided in order between the first electrode and the second electrode and extend in the effective pixel region.
    Type: Application
    Filed: January 27, 2020
    Publication date: May 5, 2022
    Inventor: Takahiro KAMEI
  • Publication number: 20210272995
    Abstract: An imaging element according to an embodiment of the present disclosure includes: a sensor substrate having a light-receiving region in which a plurality of light-receiving elements are arranged and a peripheral region provided around the light-receiving region; a sealing member disposed to be opposed to one surface of the sensor substrate; a resin layer that attaches the sensor substrate and the sealing member to each other; and an excavated part provided in the peripheral region of the one surface of the sensor substrate, and in which the resin layer is embedded, with the resin layer having one or a plurality of gaps inside the excavated part in a plan view.
    Type: Application
    Filed: June 14, 2019
    Publication date: September 2, 2021
    Inventors: YOSHIAKI MASUDA, YUTAKA OOKA, SOTETSU SAITO, TAKAHIRO KAMEI, WATARU ISHII, NAOKI SATO, SHINICHI MATSUOKA, HIROKAZU YOSHIDA
  • Publication number: 20210020546
    Abstract: Provided is a semiconductor device having high planarity in an in-plane direction. This semiconductor device includes a semiconductor substrate, a first plating film pattern, a second plating film pattern, and an insulating layer. The semiconductor substrate has a first surface, and a second surface on a side opposite to the first surface. The first plating film pattern includes a first portion that covers a first regional portion of the first surface, and a second portion that is stacked to cover a portion of the first portion. The second plating film pattern includes a third portion that covers a second regional portion different from the first regional portion of the first surface, and also includes a fourth portion that is stacked to cover a portion of the third portion. A portion between the second portion and the fourth portion is filled with the insulating layer.
    Type: Application
    Filed: February 18, 2019
    Publication date: January 21, 2021
    Inventors: TAKAHIRO KAMEI, YOICHI OOTSUKA
  • Patent number: 9419434
    Abstract: A power switching apparatus includes: a first input terminal to which first power is supplied; a second input terminal to which second power is supplied, the second power having a voltage that is lower than a voltage that the first power has; a first output terminal to supply to an outside the first power supplied to the first input terminal; and a second output terminal to supply to the outside the second power supplied to the second input terminal. First switching means manages the supplying of the second power from the first input terminal to the second output terminal. Second switching means manages the supplying of the second power from the second input terminal to the second output terminal. A processor manages the supplies of the first power and the second power using the first and second switching means.
    Type: Grant
    Filed: April 16, 2014
    Date of Patent: August 16, 2016
    Assignees: FUJITSU LIMITED, FUJITSU ADVANCED ENGINEERING LIMITED
    Inventors: Susumu Eguchi, Takahiro Kamei
  • Patent number: 8943968
    Abstract: A method for producing a metal thin film on a substrate includes: a step of applying an ink to a flat blanket; a first transfer step of bringing the first blanket and a letterpress having a predetermined pattern of projections into contact by a pressure compression while the flat blanked and the letterpress being disposed opposite each other, to selectively transfer a portion of the ink on the flat blanket corresponding to the projections to the letterpress; a second transfer step of bringing the flat blanket obtained after the first transfer step and the substrate into contact by pressure compression while the flat blanket and the substrate being disposed opposite each other, to transfer the ink remaining on the flat blanket to the substrate; and a step of subjecting the substrate obtained after the second transfer step to electroless plating to deposit a metal thin film on the substrate.
    Type: Grant
    Filed: January 9, 2012
    Date of Patent: February 3, 2015
    Assignee: Sony Corporation
    Inventors: Masanobu Tanaka, Hirotsugu Ishihara, Toshiki Shimamura, Takahiro Kamei
  • Patent number: 8943963
    Abstract: A method for producing a metal thin film on a substrate includes: a step of applying an ink to a flat blanket; a first transfer step of bringing the first blanket and a letterpress having a predetermined pattern of projections into contact by a pressure compression while the flat blanked and the letterpress being disposed opposite each other, to selectively transfer a portion of the ink on the flat blanket corresponding to the projections to the letterpress; a second transfer step of bringing the flat blanket obtained after the first transfer step and the substrate into contact by pressure compression while the flat blanket and the substrate being disposed opposite each other, to transfer the ink remaining on the flat blanket to the substrate; and a step of subjecting the substrate obtained after the second transfer step to electroless plating to deposit a metal thin film on the substrate.
    Type: Grant
    Filed: September 15, 2011
    Date of Patent: February 3, 2015
    Assignee: Sony Corporation
    Inventors: Masanobu Tanaka, Hirotsugu Ishihara, Toshiki Shimamura, Takahiro Kamei
  • Publication number: 20140225438
    Abstract: A power switching apparatus includes: a first input terminal to which first power is supplied; a second input terminal to which second power is supplied, the second power having a voltage that is lower than a voltage that the first power has; a first output terminal to supply to an outside the first power supplied to the first input terminal; and a second output terminal to supply to the outside the second power supplied to the second input terminal. First switching means manages the supplying of the second power from the first input terminal to the second output terminal. Second switching means manages the supplying of the second power from the second input terminal to the second output terminal. A processor manages the supplies of the first power and the second power using the first and second switching means.
    Type: Application
    Filed: April 16, 2014
    Publication date: August 14, 2014
    Applicants: FUJITSU LIMITED, FUJITSU ADVANCED ENGINEERING LIMITED
    Inventors: Susumu Eguchi, Takahiro Kamei
  • Patent number: 8394728
    Abstract: A film deposition method includes the steps of: coating a solution containing a polysilane compound on a substrate to form a coating film and then carrying out a first thermal treatment in an inert atmosphere, thereby forming the coating film into a silicon film; forming a coating film containing a polysilane compound on the silicon film and then carrying out a second thermal treatment in an inert atmosphere or a reducing atmosphere, thereby forming the coating film into a silicon oxide precursor film; and carrying out a third thermal treatment in an oxidizing atmosphere, thereby forming the silicon oxide precursor film into a silicon oxide film and simultaneously densifying the silicon film.
    Type: Grant
    Filed: January 27, 2010
    Date of Patent: March 12, 2013
    Assignee: Sony Corporation
    Inventors: Hirotaka Akao, Yuriko Kaino, Takahiro Kamei, Masaki Hara, Kenichi Kurihara
  • Patent number: 8381649
    Abstract: A printing method including the steps of, forming a transfer layer on a blanket, forming a groove portion on the transfer layer by pressing a protrusion portion of a mold member including the protrusion portion having a predetermined pattern against the transfer layer, the groove portion having the pattern corresponding to the protrusion portion, forming a print pattern layer on the blanket by causing the transfer layer on the blanket and a relief printing plate including a convex portion having a pattern corresponding to a reverse pattern of the protrusion portion to face each other and pressure-contacting them so that a portion on the transfer layer corresponding to the convex portion is selectively eliminated, and transferring the print pattern layer onto a substrate to be printed by causing the print pattern layer on the blanket and the substrate to be printed to face each other and pressure-contacting them.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: February 26, 2013
    Assignee: Sony Corporation
    Inventors: Masanobu Tanaka, Takahiro Kamei
  • Publication number: 20120244279
    Abstract: A polarizer capable of being manufactured in simple steps, and a method of manufacturing the polarizer, as well as a liquid crystal projector are provided. The polarizer includes a substrate having light permeability, and a plurality of linear projections being arranged on the substrate and extending along one direction within a plane thereof. Each of the linear projections having a base layer and a plating layer in the named order from the substrate, the base layer containing a catalyst material for electroless plating process, and the plating layer being deposited by using the base layer as a catalyst.
    Type: Application
    Filed: June 6, 2012
    Publication date: September 27, 2012
    Applicant: SONY CORPORATION
    Inventors: Hirotsugu ISHIHARA, Masanobu TANAKA, Toshiki SHIMAMURA, Takahiro KAMEI
  • Patent number: 8212971
    Abstract: A polarizer capable of being manufactured in simple steps, and a method of manufacturing the polarizer, as well as a liquid crystal projector are provided. The polarizer includes a substrate having light permeability, and a plurality of linear projections being arranged on the substrate and extending along one direction within a plane thereof. Each of the linear projections having a base layer and a plating layer in the named order from the substrate, the base layer containing a catalyst material for electroless plating process, and the plating layer being deposited by using the base layer as a catalyst.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: July 3, 2012
    Assignee: Sony Corporation
    Inventors: Hirotsugu Ishihara, Masanobu Tanaka, Toshiki Shimamura, Takahiro Kamei
  • Publication number: 20120103222
    Abstract: A method for producing a metal thin film on a substrate includes: a step of applying an ink to a flat blanket; a first transfer step of bringing the first blanket and a letterpress having a predetermined pattern of projections into contact by a pressure compression while the flat blanked and the letterpress being disposed opposite each other, to selectively transfer a portion of the ink on the flat blanket corresponding to the projections to the letterpress; a second transfer step of bringing the flat blanket obtained after the first transfer step and the substrate into contact by pressure compression while the flat blanket and the substrate being disposed opposite each other, to transfer the ink remaining on the flat blanket to the substrate; and a step of subjecting the substrate obtained after the second transfer step to electroless plating to deposit a metal thin film on the substrate.
    Type: Application
    Filed: January 9, 2012
    Publication date: May 3, 2012
    Applicant: Sony Corporation
    Inventors: Masanobu Tanaka, Hirotsugu Ishihara, Toshiki Shimamura, Takahiro Kamei
  • Publication number: 20120000382
    Abstract: A method for producing a metal thin film on a substrate includes: a step of applying an ink to a flat blanket; a first transfer step of bringing the first blanket and a letterpress having a predetermined pattern of projections into contact by a pressure compression while the flat blanked and the letterpress being disposed opposite each other, to selectively transfer a portion of the ink on the flat blanket corresponding to the projections to the letterpress; a second transfer step of bringing the flat blanket obtained after the first transfer step and the substrate into contact by pressure compression while the flat blanket and the substrate being disposed opposite each other, to transfer the ink remaining on the flat blanket to the substrate; and a step of subjecting the substrate obtained after the second transfer step to electroless plating to deposit a metal thin film on the substrate.
    Type: Application
    Filed: September 15, 2011
    Publication date: January 5, 2012
    Applicant: Sony Corporation
    Inventors: Masanobu Tanaka, Hirotsugu Ishihara, Toshiki Shimamura, Takahiro Kamei
  • Publication number: 20100220270
    Abstract: A method for forming a reflection electrode is provided which includes the steps of: forming a first catalytic layer in a first region of an electrode forming region of a substrate; forming a first plating layer on the first catalytic layer by performing a first electroless plating treatment; forming a second catalytic layer at least in a region (second region) of the electrode forming region other than the first region; and forming a second plating layer on the second catalytic layer by performing a second electroless plating treatment, so that the reflection electrode is formed to have a concave-convex surface.
    Type: Application
    Filed: February 18, 2010
    Publication date: September 2, 2010
    Applicant: SONY CORPORATION
    Inventors: Hirotsugu Ishihara, Masanobu Tanaka, Toshiki Shimamura, Takahiro Kamei
  • Publication number: 20100197102
    Abstract: A film deposition method includes the steps of: coating a solution containing a polysilane compound on a substrate to form a coating film and then carrying out a first thermal treatment in an inert atmosphere, thereby forming the coating film into a silicon film; forming a coating film containing a polysilane compound on the silicon film and then carrying out a second thermal treatment in an inert atmosphere or a reducing atmosphere, thereby forming the coating film into a silicon oxide precursor film; and carrying out a third thermal treatment in an oxidizing atmosphere, thereby forming the silicon oxide precursor film into a silicon oxide film and simultaneously densifying the silicon film.
    Type: Application
    Filed: January 27, 2010
    Publication date: August 5, 2010
    Applicant: SONY CORPORATION
    Inventors: Hirotaka Akao, Yuriko Kaino, Takahiro Kamei, Masaki Hara, Kenichi Kurihara
  • Publication number: 20100173553
    Abstract: A printing method including the steps of, forming a transfer layer on a blanket, forming a groove portion on the transfer layer by pressing a protrusion portion of a mold member including the protrusion portion having a predetermined pattern against the transfer layer, the groove portion having the pattern corresponding to the protrusion portion, forming a print pattern layer on the blanket by causing the transfer layer on the blanket and a relief printing plate including a convex portion having a pattern corresponding to a reverse pattern of the protrusion portion to face each other and pressure-contacting them so that a portion on the transfer layer corresponding to the convex portion is selectively eliminated, and transferring the print pattern layer onto a substrate to be printed by causing the print pattern layer on the blanket and the substrate to be printed to face each other and pressure-contacting them.
    Type: Application
    Filed: December 23, 2009
    Publication date: July 8, 2010
    Applicant: SONY CORPORATION
    Inventors: Masanobu Tanaka, Takahiro Kamei
  • Patent number: 7733219
    Abstract: A sensor assembly includes a elongate article and a plurality of elongate piezoelectric elements provided to the elongate article. Each of the piezoelectric elements is configured so that when a load is applied in a direction perpendicular to a surface of the piezoelectric element, a short axis direction of the piezoelectric element becomes a sensitivity direction in which a voltage is generated, and a major axis direction becomes a non-sensitivity direction in which a voltage is not generated.
    Type: Grant
    Filed: August 7, 2008
    Date of Patent: June 8, 2010
    Assignee: Honda Motor Co., Ltd.
    Inventors: Takahiro Kamei, Yoshimasa Eguchi