Patents by Inventor Takahiro Kida
Takahiro Kida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240114747Abstract: A display device includes: a substrate; a pixel electrode disposed on the substrate, the pixel electrode including a first portion and a second portion disposed outside the first portion, the first portion protruding to a second side opposite to a first side closer to the substrate than the second portion; a light-emitting layer disposed across the second side of the first portion and the second side of the second portion; a first edge cover disposed across the second side of a side edge portion of the first portion and the second side of the second portion, the first edge cover including an opening formed on the second side of a central portion of the first portion, the first edge cover covering an edge of the first portion; and a counter electrode including a portion disposed closer to the second side than the first edge cover.Type: ApplicationFiled: December 22, 2020Publication date: April 4, 2024Inventors: YASUSHI ASAOKA, Sentaro KIDA, Takahiro ADACHI
-
Publication number: 20180139092Abstract: An information processing apparatus includes a storage unit and a processing unit. The storage unit stores a command for acquiring configuration information from a target apparatus, in association with the name of the apparatus. The processing unit acquires the name of the target apparatus that is subjected to acquisition of configuration information, by accessing the target apparatus present on a network, based on access information for accessing the target apparatus. The processing unit acquires the configuration information from the target apparatus, by causing the target apparatus to execute the command associated with the name of the target apparatus. Further, the processing unit creates a configuration information list listing the configuration information.Type: ApplicationFiled: October 20, 2017Publication date: May 17, 2018Applicant: FUJITSU LIMITEDInventors: Tomoya KONISHI, Takahiro KIDA, Masashi SUMI
-
Patent number: 9905411Abstract: Method for processing a semiconductor-wafer having a front surface, back surface, and chamfered-portion composed of a chamfered surface on the front surface side, a chamfered surface on the back surface side, and an end face at a peripheral end, including: mirror-polishing of each portion of the chamfered surface on the front surface side, the chamfered surface on the back surface side, the end face, and an outermost peripheral-portion on the front or back surface adjacent to the chamfered surface; wherein the end face mirror-polishing and mirror-polishing of the outermost peripheral-portion on the front or back surface are performed in one step, after step of mirror-polishing the chamfered surface on the front surface side and step of mirror-polishing the chamfered surface on the back surface side; roll-off amount of the outermost peripheral-portion on the front or back surface is adjusted by one step-performed mirror-polishing of the end face and outermost peripheral-portion.Type: GrantFiled: August 19, 2015Date of Patent: February 27, 2018Assignee: SHIN-ETSU HANDOTAI CO., LTD.Inventors: Yuki Miyazawa, Takahiro Kida, Tomofumi Takano
-
Publication number: 20170366371Abstract: According to an aspect, a communication device setting apparatus, that performs setting in a plurality of switch devices, includes a setting control unit, a power supply control unit, and a setting unit. The setting control unit sequentially selects the setting contents with respect to the switch devices whose wire connection has been completed. The power supply control unit performs control to supply power to the switch devices in which the setting contents selected by the setting control unit are to be set. The setting unit performs setting according to the setting contents, which are selected by the setting control unit, in the switch devices to which power is supplied by the power supply control unit.Type: ApplicationFiled: August 31, 2017Publication date: December 21, 2017Applicant: FUJITSU LIMITEDInventor: Takahiro KIDA
-
Publication number: 20170301533Abstract: Method for processing a semiconductor-wafer having a front surface, back surface, and chamfered-portion composed of a chamfered surface on the front surface side, a chamfered surface on the back surface side, and an end face at a peripheral end, including: mirror-polishing of each portion of the chamfered surface on the front surface side, the chamfered surface on the back surface side, the end face, and an outermost peripheral-portion on the front or back surface adjacent to the chamfered surface; wherein the end face mirror-polishing and mirror-polishing of the outermost peripheral-portion on the front or back surface are performed in one step, after step of mirror-polishing the chamfered surface on the front surface side and step of mirror-polishing the chamfered surface on the back surface side; roll-off amount of the outermost peripheral-portion on the front or back surface is adjusted by one step-performed mirror-polishing of the end face and outermost peripheral-portion.Type: ApplicationFiled: August 19, 2015Publication date: October 19, 2017Applicant: SHIN-ETSU HANDOTAI CO., LTD.Inventors: Yuki MIYAZAWA, Takahiro KIDA, Tomofumi TAKANO
-
Patent number: 9108289Abstract: A wafer polishing apparatus configured to polish simultaneously both surfaces of a wafer by pressing and rubbing the wafer, while holding the wafer with: a lower turn table having a flat polishing-upper-surface rotationally driven; an upper turn table having a flat polishing-lower-surface rotationally driven, the upper turn table being arranged with facing to the lower turn table; and a carrier having a wafer-holding hole for holding the wafer, wherein the polishing is performed while measuring a thickness of the wafer through a plurality of openings provided between a rotation center and an edge of the upper turn table or the lower turn table, and switching a polishing slurry with a polishing slurry having a different polishing rate during the polishing of the wafer. As a result, the wafer polishing apparatus can manufacture a wafer having a high flatness and a high smoothness at high productivity and high yield.Type: GrantFiled: July 30, 2014Date of Patent: August 18, 2015Assignee: SHIN-ETSU HANDOTAI CO., LTD.Inventors: Daisuke Furukawa, Kazumasa Asai, Takahiro Kida, Tadao Tanaka
-
Publication number: 20150031271Abstract: A wafer polishing apparatus configured to polish simultaneously both surfaces of a wafer by pressing and rubbing the wafer, while holding the wafer with: a lower turn table having a flat polishing-upper-surface rotationally driven; an upper turn table having a flat polishing-lower-surface rotationally driven, the upper turn table being arranged with facing to the lower turn table; and a carrier having a wafer-holding bole for holding the wafer, wherein the polishing is performed while measuring a thickness of the wafer through a plurality of openings provided between a rotation center and an edge of the upper turn table or the lower turn table, and switching a polishing slurry with a polishing slurry having a different polishing rate during the polishing of the wafer. As a result, the wafer polishing apparatus can manufacture a wafer having a high flatness and a high smoothness at high productivity and high yield.Type: ApplicationFiled: July 30, 2014Publication date: January 29, 2015Applicant: SHIN-ETSU HANDOTAI CO., LTD.Inventors: Daisuke FURUKAWA, Kazumasa ASAI, Takahiro KIDA, Tadao TANAKA
-
Patent number: 8834230Abstract: The present invention is a wafer polishing method including simultaneously polishing both surfaces of a wafer by pressing and rubbing the wafer, while holding the wafer with: a lower turn table having a flat polishing-upper-surface rotationally driven; an upper turn table having a flat polishing-lower-surface rotationally driven, the upper turn table being arranged with facing to the lower turn table; and a carrier having a wafer-holding hole for holding the wafer, wherein the polishing is performed while measuring a thickness of the wafer through a plurality of openings provided between a rotation center and an edge of the upper turn table or the lower turn table, and switching a polishing slurry with a polishing slurry having a different polishing rate during the polishing of the wafer. As a result, there is provided a wafer polishing method that can manufacture a wafer having a high flatness and a high smoothness at high productivity and high yield.Type: GrantFiled: June 30, 2009Date of Patent: September 16, 2014Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Daisuke Furukawa, Kazumasa Asai, Takahiro Kida, Tadao Tanaka
-
Patent number: 8505269Abstract: Charges accumulated inside a wall structure of a resin vessel, which is sterilized by an electron beam irradiator, and an ionizer disposed outside a filler emits to the outer surface of the resin vessel are eliminated with negative ions having the same polarity as that of charges accumulated in the wall section of the resin vessel, while conveying the resin vessel sterilized by the electron beam irradiator to the filler, by which liquid fills the resin vessel.Type: GrantFiled: June 23, 2010Date of Patent: August 13, 2013Assignee: Shibuya Kogyo Co., Ltd.Inventors: Toshiya Kobayashi, Mitsuomi Narita, Tomohiko Sugimori, Tsunehiko Yokoi, Yukinobu Nishino, Masami Hayashi, Takashi Kadoya, Tokuo Nishi, Yukihiro Yamamoto, Takuya Onishi, Takahiro Kida, Kouichi Murata
-
Publication number: 20130182363Abstract: To eliminate charges accumulated inside a wall structure of a resin vessel 2, which is sterilized by an electron beam irradiator 16, an ionizer 134 disposed outside a filler 112 emits to the outer surface of the resin vessel 2 with negative ions having the same polarity as that of charges accumulated in the wall section of the resin vessel 2, while conveying the resin vessel 2 sterilized by the electron beam irradiator 16 to the filler 112, by which liquid fills the resin vessel 2. A filling nozzle 132 is connected to ground, and an ion flowing path is formed through a liquid column La filling the interior of the resin vessel 2 from the filling nozzle 132.Type: ApplicationFiled: March 7, 2013Publication date: July 18, 2013Inventors: Toshiya KOBAYASHI, Mitsuomi NARITA, Tomohiko SUGIMORI, Tsunehiko YOKOI, Yukinobu NISHINO, Masami HAYASHI, Takashi KADOYA, Tokuo NISHI, Yukihiro YAMAMOTO, Takuya ONISHI, Takahiro KIDA, Kouichi MURATA
-
Publication number: 20110130073Abstract: The present invention is a wafer polishing method including simultaneously polishing both surfaces of a wafer by pressing and rubbing the wafer, while holding the wafer with: a lower turn table having a flat polishing-upper-surface rotationally driven; an upper turn table having a flat polishing-lower-surface rotationally driven, the upper turn table being arranged with facing to the lower turn table; and a carrier having a wafer-holding hole for holding the wafer, wherein the polishing is performed while measuring a thickness of the wafer through a plurality of openings provided between a rotation center and an edge of the upper turn table or the lower turn table, and switching a polishing slurry with a polishing slurry having a different polishing rate during the polishing of the wafer. As a result, there is provided a wafer polishing method that can manufacture a wafer having a high flatness and a high smoothness at high productivity and high yield.Type: ApplicationFiled: June 30, 2009Publication date: June 2, 2011Applicant: SHIN-ETSU HANDOTAI CO., LTD.Inventors: Daisuke Furukawa, Kazumasa Asai, Takahiro Kida, Tadao Tanaka
-
Publication number: 20100326563Abstract: It is aimed to eliminate charges accumulated inside a wall structure of a resin vessel 2, which is sterilized by an electron beam irradiator 16, and an ionizer 134 disposed outside a filler 112 emits to the outer surface of the resin vessel 2 with negative ions having the same polarity as that of charges accumulated in the wall section of the resin vessel 2, while conveying the resin vessel 2 sterilized by the electron beam irradiator 16 to the filler 112, by which liquid fills the resin vessel 2. A filling nozzle 132 is connected to ground, and an ion flowing path is formed through a liquid column La filling the interior of the resin vessel 2 from the filling nozzle 132.Type: ApplicationFiled: June 23, 2010Publication date: December 30, 2010Inventors: Toshiya Kobayashi, Mitsuomi Narita, Tomohiko Sugimori, Tsunehiko Yokoi, Yukinobu Nishino, Masami Hayashi, Takashi Kadoya, Tokuo Nishi, Yukihiro Yamamoto, Takuya Onishi, Takahiro Kida, Kouichi Murata
-
Publication number: 20080125016Abstract: The present invention is a method for producing a polishing agent in which silica particles are dispersed in an aqueous solution, comprising at least a step of removing metal compound ions from a prepared silica sol by ion exchange (B); a step of purifying further the ion-exchanged silica sol (D); a step of adding alkali metal hydroxide to the purified silica sol (F); and a step of adding an acid to the silica sol to which the alkali metal hydroxide is added (G). There is provided a method for producing a polishing agent which can extremely effectively suppress metal contamination when a silicon wafer or the like is polished can be produced.Type: ApplicationFiled: November 25, 2005Publication date: May 29, 2008Applicant: SHIN-ETSU HANDOTAI CO., LTD.Inventors: Mikio Nakamura, Takahiro Kida, Tomofumi Takano, Toshihiko Imai, Masaaki Ohshima
-
Patent number: 7250368Abstract: The present invention provides a method for manufacturing a semiconductor wafer capable of manufacturing a wafer without ring-like sag in an outer peripheral portion thereof when polishing an alkali etched wafer, and a wafer without the ring-like sag in an outer peripheral portion thereof. The present invention comprises: a back surface part polishing and edge polishing step for performing back surface part polishing and edge polishing such that mirror polishing is performed on a chamfered portion and an inner part extending inward from a boundary between the chamfered portion and a back surface of a starting wafer; and a front surface polishing step for mirror polishing a front surface of the wafer subjected to the back surface part polishing and edge polishing step holding the wafer by the back surface thereof.Type: GrantFiled: April 24, 2003Date of Patent: July 31, 2007Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Takahiro Kida, Seiichi Miyazaki, Kazuhiko Nishimura, Nobuyuki Hayashi, Katsunori Arai
-
Publication number: 20050142882Abstract: The present invention provides a method for manufacturing a semiconductor wafer capable of manufacturing a wafer without ring-like sag in an outer peripheral portion thereof when polishing an alkali etched wafer, and a wafer without the ring-like sag in an outer peripheral portion thereof. The present invention comprises: a back surface part polishing and edge polishing step for performing back surface part polishing and edge polishing such that mirror polishing is performed on a chamfered portion and an inner part extending inward from a boundary between the chamfered portion and a back surface of a starting wafer; and a front surface polishing step for mirror polishing a front surface of the wafer subjected to the back surface part polishing and edge polishing step holding the wafer by the back surface thereof.Type: ApplicationFiled: April 24, 2003Publication date: June 30, 2005Inventors: Takahiro Kida, Seiichi Miyazaki, Kazuhiko Nishimura, Nobuyuki Hayashi, Katsunori Arai
-
Patent number: 6764392Abstract: A polishing method and polishing apparatus capable of improving the flatness of a wafer are provided. When a wafer is adhered to a wafer holding plate for polishing a surface to be polished of the wafer by pressing and rubbing the surface to be polished against a polishing pad on a polishing turn table, the wafer is held by vacuum-chucking the surface to be polished of the wafer such that a surface to be adhered of the wafer forms a convex surface in a vicinity including an arbitrary point in the surface to be adhered within a region surrounding a center of the surface to be adhered of the wafer, and the region being at least not less than 50% of an entire adhesion area; and the wafer is adhered to the wafer holding plate from a central portion of the surface to be adhered of the wafer.Type: GrantFiled: August 16, 2001Date of Patent: July 20, 2004Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Takashi Nihonmatsu, Takahiro Kida, Tadao Tanaka
-
Patent number: 6713429Abstract: A purification catalyst for exhaust gas is provided that uses a hexagonal cell monolithic carrier which is able to demonstrate purification performance that is superior to the case of using a square cell monolithic carrier. This purification catalyst for exhaust gas comprises a monolithic carrier (10) provided with hexagonal cells (15) of 200 cells/in2 or more in which the porosity of partition walls (11) that form the cells (15) is 25% or more; and, a catalyst layer (2) arranged on the surface of the partition walls (11) of the monolithic carrier (10) that contains a catalyst component for purification of exhaust gas. The thickness of catalyst layer (2) is 10-70 &mgr;m at its thin portion (21), and its thick portion (22) has a thickness of no more than 12 times that of thin portion (21).Type: GrantFiled: December 16, 1999Date of Patent: March 30, 2004Assignee: Denso CorporationInventors: Masakazu Tanaka, Yosiyasu Andou, Keiji Ito, Takahiro Kida
-
Patent number: 6558227Abstract: There is disclosed a method for polishing a work wherein polishing liquid is supplied to a polishing pad, and a relative movement is carried out between the work and the polishing pad with pressing the work on the polishing pad, wherein the work of which press pressure was set to 0 to terminate polishing is released from the polishing pad within 45 seconds after the termination of polishing. When plural works are simultaneously polished, preferably only the work to which press pressure was set to 0 to terminate polishing is released from the polishing pad, and polishing of the other works is continued, which are released from the polishing pad after press pressure thereto is set 0 one by one.Type: GrantFiled: June 26, 2001Date of Patent: May 6, 2003Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Masao Kodaira, Mikio Nakamura, Takahiro Kida
-
Publication number: 20020160693Abstract: A polishing method and polishing apparatus capable of improving the flatness of a wafer are provided. When a wafer is adhered to a wafer holding plate for polishing a surface to be polished of the wafer by pressing and rubbing the surface to be polished against a polishing pad on a polishing turn table, the wafer is held by vacuum-chucking the surface to be polished of the wafer such that a surface to be adhered of the wafer forms a convex surface in a vicinity including an arbitrary point in the surface to be adhered within a region surrounding a center of the surface to be adhered of the wafer, and the region being at least not less than 50% of an entire adhesion area; and the wafer is adhered to the wafer holding plate from a central portion of the surface to be adhered of the wafer.Type: ApplicationFiled: August 16, 2001Publication date: October 31, 2002Inventors: Takashi Nihonmatsu, Takahiro Kida, Tadao Tanaka
-
Patent number: 6217417Abstract: A method for polishing a thin plate including holding the thin plate on a front surface of a holding plate, and moving the thin plate and a polishing pad relative to each other while pressing the thin plate against the polishing pad and supplying a polishing slurry between them. The holding plate is composed of ceramic. The front surface of the holding plate has been previously polished.Type: GrantFiled: March 15, 1999Date of Patent: April 17, 2001Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Mikio Nakamura, Takahiro Kida