Patents by Inventor Takahiro Kitazawa

Takahiro Kitazawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210057245
    Abstract: Film information about a thin film formed on the front surface of a semiconductor wafer, substrate information about the semiconductor wafer, and an installation angle of an upper radiation thermometer are set and input. Emissivity of the front surface of the semiconductor wafer formed with a multilayer film is calculated based on the various kinds of information. Further, a weighted average efficiency of the emissivity of the front surface of the semiconductor wafer is determined based on a sensitivity distribution of the upper radiation thermometer. Front surface temperature of the semiconductor wafer at the time of heat treatment is measured using the determined weighted average efficiency of the emissivity. The emissivity is determined based on the film information and the like, so that the front surface temperature of the semiconductor wafer can be accurately measured even when thin films are formed in multiple layers.
    Type: Application
    Filed: July 1, 2020
    Publication date: February 25, 2021
    Inventors: Tomohiro UENO, Takahiro KITAZAWA, Yoshihide NOZAKI
  • Patent number: 10784127
    Abstract: A pyrometer holder is mounted to an outer wall of a chamber while holding a lower radiation thermometer. The front end of the lower radiation thermometer is brought into abutment with a mounting portion of the pyrometer holder, and a bottom plate is brought into abutment with the rear end of the lower radiation thermometer. A tension spring is tensioned between the bottom plate and the mounting portion to prevent the lower radiation thermometer from falling off or misregistration. An angle adjusting mechanism adjusts the angle of the radiation thermometer with respect to the outer wall of the chamber, with the front end of the radiation thermometer serving as a supporting point. Thus, the measurement position of the lower radiation thermometer is adjusted.
    Type: Grant
    Filed: February 26, 2018
    Date of Patent: September 22, 2020
    Assignee: SCREEN HOLDINGS CO., LTD.
    Inventors: Kazuhiko Fuse, Shinji Miyawaki, Takahiro Kitazawa
  • Publication number: 20200196389
    Abstract: A carrier containing a plurality of semiconductor wafers in a lot is transported into a heat treatment apparatus. Thereafter, a recipe specifying treatment procedures and treatment conditions is set for each of the semiconductor wafers. Next, a reflectance of each of the semiconductor wafers stored in the carrier is measured. Based on the set recipe and the measured reflectance of each semiconductor wafer, a predicted attainable temperature of each semiconductor wafer at the time of flash heating treatment is calculated, and the calculated predicted attainable temperature is displayed. This allows the setting of the treatment conditions with reference to the displayed predicted attainable temperature, to thereby easily achieve the setting of the heat treatment conditions.
    Type: Application
    Filed: December 2, 2019
    Publication date: June 18, 2020
    Inventors: Tomohiro UENO, Takayuki AOYAMA, Mao OMORI, Takahiro KITAZAWA, Katsuichi AKIYOSHI
  • Patent number: 10643869
    Abstract: A semiconductor wafer that has a plane orientation of (100) and is made of monocrystalline silicon is warped along an axis, i.e., a diameter along a <100> direction of the semiconductor wafer when irradiated with a flash of light. The semiconductor wafer is placed on a susceptor while the direction of the semiconductor wafer is adjusted so that the diameter along the <100> direction coincides with an optical axis of an upper radiation thermometer. This adjustment makes a diameter along a direction in which a warp of the semiconductor wafer is smallest during irradiation with a flash of light coincide with the optical axis of the upper radiation thermometer. As a result, the semiconductor wafer is hardly warped along the optical axis direction of the upper radiation thermometer even during irradiation with a flash of light, thus hardly changing the emissivity of the semiconductor wafer, so that it is possible to accurately measure the temperature of an upper surface of the semiconductor wafer.
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: May 5, 2020
    Assignee: SCREEN HOLDINGS CO., LTD.
    Inventors: Takahiro Kitazawa, Kazuhiko Fuse
  • Publication number: 20180269085
    Abstract: A pyrometer holder is mounted to an outer wall of a chamber while holding a lower radiation thermometer. The front end of the lower radiation thermometer is brought into abutment with a mounting portion of the pyrometer holder, and a bottom plate is brought into abutment with the rear end of the lower radiation thermometer. A tension spring is tensioned between the bottom plate and the mounting portion to prevent the lower radiation thermometer from falling off or misregistration. An angle adjusting mechanism adjusts the angle of the radiation thermometer with respect to the outer wall of the chamber, with the front end of the radiation thermometer serving as a supporting point. Thus, the measurement position of the lower radiation thermometer is adjusted.
    Type: Application
    Filed: February 26, 2018
    Publication date: September 20, 2018
    Inventors: Kazuhiko Fuse, Shinji Miyawaki, Takahiro Kitazawa
  • Publication number: 20180254224
    Abstract: A front surface of a semiconductor wafer is rapidly heated by irradiation of a flash of light. Temperature of the front surface of the semiconductor wafer is measured at predetermined intervals after the irradiation of the flash of light, and is sequentially accumulated to acquire a temperature profile. From the temperature profile, an average value and a standard deviation are each calculated as a characteristic value. It is determined that the semiconductor wafer is cracked when an average value of the temperature profile deviates from the range of ±5? from a total average of temperature profiles of a plurality of semiconductor wafers or when a standard deviation of the temperature profile deviates from the range of 5? from the total average thereof of the plurality of semiconductor wafers.
    Type: Application
    Filed: March 2, 2018
    Publication date: September 6, 2018
    Inventors: Takahiro KITAZAWA, Mao OMORI, Kazuhiko FUSE
  • Publication number: 20180240689
    Abstract: A semiconductor wafer that has a plane orientation of (100) and is made of monocrystalline silicon is warped along an axis, i.e., a diameter along a <100> direction of the semiconductor wafer when irradiated with a flash of light. The semiconductor wafer is placed on a susceptor while the direction of the semiconductor wafer is adjusted so that the diameter along the <100> direction coincides with an optical axis of an upper radiation thermometer. This adjustment makes a diameter along a direction in which a warp of the semiconductor wafer is smallest during irradiation with a flash of light coincide with the optical axis of the upper radiation thermometer. As a result, the semiconductor wafer is hardly warped along the optical axis direction of the upper radiation thermometer even during irradiation with a flash of light, thus hardly changing the emissivity of the semiconductor wafer, so that it is possible to accurately measure the temperature of an upper surface of the semiconductor wafer.
    Type: Application
    Filed: January 11, 2018
    Publication date: August 23, 2018
    Inventors: Takahiro Kitazawa, Kazuhiko Fuse
  • Patent number: 7012285
    Abstract: A semiconductor device whose insertion loss is reduced and isolation characteristics are improved in a high frequency band by reducing the capacitance component when an FET is off is provided. FETs (30a, 30b) having a gate electrode with a gate length of not more than 0.8 ?m are formed on a semiconductor substrate in which a buffer layer (24) having an impurity concentration of at least 1010 cm?3 and at most 1014 cm?3 is formed on a semi-insulating semiconductor (25) having at least 1014 cm?3 and at most 1016 cm?3 p-type or n-type impurities and an active layer (23) having a p-type or n-type impurity concentration of at least 1015 cm?3 and at most 1017 cm?3 is formed on the buffer layer.
    Type: Grant
    Filed: September 12, 2002
    Date of Patent: March 14, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tadayoshi Nakatsuka, Toshiharu Tambo, Takahiro Kitazawa, Akiyoshi Tamura, Katsuyoshi Tara
  • Publication number: 20040026742
    Abstract: A semiconductor device whose insertion loss is reduced and isolation characteristics are improved in a high frequency band by reducing the capacitance component when an FET is off is provided. FETs (30a, 30b) having a gate electrode with a gate length of not more than 0.8 &mgr;m are formed on a semiconductor substrate in which a buffer layer (24) having an impurity concentration of at least 1010 cm−3 and at most 1014 cm−3 is formed on a semi-insulating semiconductor (25) having at least 1014 cm−3 and at most 1016 cm−3 p-type or n-type impurities and an active layer (23) having a p-type or n-type impurity concentration of at least 1015 cm−3 and at most 1017 cm−3 is formed on the buffer layer.
    Type: Application
    Filed: May 8, 2003
    Publication date: February 12, 2004
    Inventors: Tadayoshi Nakatsuka, Toshiharu Tambo, Takahiro Kitazawa, Akiyoshi Tamura, Katsuyoshi Tara