Patents by Inventor Takahiro Machida

Takahiro Machida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230411648
    Abstract: A fuel cell power generation module includes a first fuel cell module, and a second fuel cell module capable of generating power with a first exhaust fuel gas exhausted from the first fuel cell module. It is configured such that a first recirculation line recirculates from a second exhaust fuel gas line through which a second exhaust fuel gas exhausted from the second fuel cell module flows, and the second exhaust fuel gas is supplied to a fuel-side electrode of the second fuel cell module.
    Type: Application
    Filed: October 26, 2021
    Publication date: December 21, 2023
    Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD.
    Inventors: Nagao Hisatome, Mitsuyoshi Iwata, Takahiro Machida
  • Publication number: 20230395830
    Abstract: A fuel cell power generation system includes: a fuel cell; a peripheral device used to operate the fuel cell; a resource storage part; and a resource supply part. The resource storage part is capable of storing a resource generated in the fuel cell in an operation/stop process of the fuel cell. The resource supply part is capable of supplying the resource stored in the resource storage part to at least either of the fuel cell or the peripheral device.
    Type: Application
    Filed: October 26, 2021
    Publication date: December 7, 2023
    Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD.
    Inventors: Mitsuyoshi Iwata, Takahiro Machida, Nagao Hisatome
  • Publication number: 20230395832
    Abstract: A fuel cell power generation system includes: a first fuel cell; and a second fuel cell connected to a downstream side of the first fuel cell via an exhaust fuel gas line, the second fuel cell being capable of generating electric power using an exhaust fuel gas from the first fuel cell. A water recovery unit is disposed on the exhaust fuel gas line, the water recovery unit being capable of recovering water contained in the exhaust fuel gas. A bypass line brings an upstream side and a downstream side of the exhaust fuel gas line with respect to the water recovery unit into communication. At least one flow control valve is disposed on at least one of the exhaust fuel gas line or the bypass line. A control unit controls an opening degree of the at least one flow control valve.
    Type: Application
    Filed: October 26, 2021
    Publication date: December 7, 2023
    Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD.
    Inventors: Mitsuyoshi Iwata, Takahiro Machida, Nagao Hisatome
  • Publication number: 20230318009
    Abstract: A manufacturing tool for a solid electrolyte sheet is a manufacturing tool for a solid electrolyte sheet configured such that a porous base is filled with a solid electrolyte material. The manufacturing tool includes a first frame member and a second frame member each having opposing sandwiching portions and sandwiching the base by the sandwiching portions. The sandwiching portions provide a fixing structure configured of provide tension to the sandwiched base.
    Type: Application
    Filed: March 29, 2023
    Publication date: October 5, 2023
    Inventors: Yohei NOJI, Akihiro YOSHIZAWA, Takahiro MACHIDA, Yusuke YOSHIZAKI
  • Publication number: 20110074049
    Abstract: A method of manufacturing a semiconductor device answerable to refinement of circuits by correctly connecting adjacent small patterns with each other with excellent reproducibility in connective exposure and a semiconductor device manufactured by this method are proposed. According to this method of manufacturing a semiconductor device, connective exposure is performed by dividing a pattern formed on a semiconductor substrate into a plurality of patterns and exposing the plurality of divided patterns in a connective manner, by forming marks for adjusting arrangement of the patterns to be connected with each other on the semiconductor substrate before exposing patterns of a semiconductor element and connectively exposing the patterns of the semiconductor element in coincidence with the marks for adjusting arrangement.
    Type: Application
    Filed: December 10, 2010
    Publication date: March 31, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Shinroku Maejima, Seiichiro Shirai, Takahiro Machida
  • Patent number: 7875409
    Abstract: A method of manufacturing a semiconductor device answerable to refinement of circuits by correctly connecting adjacent small patterns with each other with excellent reproducibility in connective exposure and a semiconductor device manufactured by this method are proposed. According to this method of manufacturing a semiconductor device, connective exposure is performed by dividing a pattern formed on a semiconductor substrate into a plurality of patterns and exposing the plurality of divided patterns in a connective manner, by forming marks for adjusting arrangement of the patterns to be connected with each other on the semiconductor substrate before exposing patterns of a semiconductor element and connectively exposing the patterns of the semiconductor element in coincidence with the marks for adjusting arrangement.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: January 25, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Shinroku Maejima, Seiichiro Shirai, Takahiro Machida
  • Publication number: 20070134564
    Abstract: A method of manufacturing a semiconductor device answerable to refinement of circuits by correctly connecting adjacent small patterns with each other with excellent reproducibility in connective exposure and a semiconductor device manufactured by this method are proposed. According to this method of manufacturing a semiconductor device, connective exposure is performed by dividing a pattern formed on a semiconductor substrate into a plurality of patterns and exposing the plurality of divided patterns in a connective manner, by forming marks for adjusting arrangement of the patterns to be connected with each other on the semiconductor substrate before exposing patterns of a semiconductor element and connectively exposing the patterns of the semiconductor element in coincidence with the marks for adjusting arrangement.
    Type: Application
    Filed: November 21, 2006
    Publication date: June 14, 2007
    Inventors: Shinroku Maejima, Seiichiro Shirai, Takahiro Machida
  • Patent number: 5466994
    Abstract: A fly-back transformer for generating a focus voltage to be applied to a cathode-ray tube, includes an iron core, a primary coil, a D.C. voltage generating circuit, and a superimposing circuit. The primary coil is wound on the iron core for receiving a pulse voltage generated during a fly-back period of a horizontal sweep signal for the cathode-ray tube. The D.C. voltage generating circuit includes at least one secondary coil wound on the iron core, for generating, in response to the pulse voltage, a D.C. voltage. The superimposing circuit generates a parabolic-wave voltage from a voltage taken out from one of the at least one secondary coil, and superimposes the parabolic-wave voltage on the D.C. voltage to generate the focus voltage. Alternatively, the superimposing circuit generates a parabolic-wave voltage from a voltage taken out by a third coil wound on the iron core, which has one end connected to an end of the at least one secondary coil.
    Type: Grant
    Filed: July 25, 1994
    Date of Patent: November 14, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Katsuyuki Akimoto, Takahiro Machida, Yoshinori Ishii