Patents by Inventor Takahiro Madokoro

Takahiro Madokoro has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7836326
    Abstract: To satisfy a required processing speed and achieve the maximum power-saving effect in a microprocessor. A control value is calculated by performing proportional and integral processing on a deviation of a target instruction execution number from a measured instruction execution number. Unification processing or unification cancellation processing is performed in accordance with the control value. The unification processing stops supply of clocks to selected pipeline registers and controls the pipeline such that a signal passes through the pipeline registers so as to reduce the number of stages of the pipeline. The unification cancellation processing resumes the supply of clocks to the selected pipeline registers and controls the pipeline such that the pipeline registers latch the signal in synchronism with the clocks so as to increase the number of stages of the pipeline. The frequency of clocks supplied to the pipeline registers is changed in accordance with the changed number of stages.
    Type: Grant
    Filed: July 25, 2007
    Date of Patent: November 16, 2010
    Assignee: National University Corporation Nagoya University
    Inventors: Toshio Shimada, Takahiro Madokoro
  • Publication number: 20080133947
    Abstract: [Objective] To satisfy a required processing speed and achieve the maximum power-saving effect in a microprocessor. [Means for Solution] A control value is calculated by performing proportional and integral processing on a deviation of a target instruction execution number from a measured instruction execution number. Unification processing or unification cancellation processing is performed in accordance with the control value. The unification processing stops supply of clocks to selected pipeline registers and controls the pipeline such that a signal passes through the pipeline registers so as to reduce the number of stages of the pipeline. The unification cancellation processing resumes the supply of clocks to the selected pipeline registers and controls the pipeline such that the pipeline registers latch the signal in synchronism with the clocks so as to increase the number of stages of the pipeline.
    Type: Application
    Filed: July 25, 2007
    Publication date: June 5, 2008
    Applicant: National University Corporation Nagoya University
    Inventors: Toshio Shimada, Takahiro Madokoro